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Message-ID: <CAD++jLnKoOPCKRi9hvqqH54g1MYbGiK9r7pMi+3z6yHG43nGFQ@mail.gmail.com>
Date: Sun, 4 Jan 2026 13:00:32 +0100
From: Linus Walleij <linusw@...nel.org>
To: Ye Zhang <ye.zhang@...k-chips.com>, Conor Dooley <conor+dt@...nel.org>
Cc: Linus Walleij <linus.walleij@...aro.org>, Heiko Stuebner <heiko@...ech.de>,
Bartosz Golaszewski <brgl@...ev.pl>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org, tao.huang@...k-chips.com
Subject: Re: [PATCH v4 7/7] ARM: dts: rockchip: rk3506: Add pinctrl and rmio
dtsi for rk3506
Hi Ye,
thanks for your patch!
On Sat, Dec 27, 2025 at 12:55 PM Ye Zhang <ye.zhang@...k-chips.com> wrote:
> +&pinctrl {
> + rm_io0 {
> + /omit-if-no-ref/
> + rm_io0_uart1_tx: rm-io0-uart1-tx {
> + rockchip,pins =
> + <0 RK_PA0 7 &pcfg_pull_none>;
> + rockchip,rmio-pins =
> + <0 0 1>;
> + };
This is just adding more and more "necessarily different"
pinmux to these poor DTS files.
I would do this:
&pinctrl {
rm_io0 {
rm_io0_uart1_tx: rm-io0-uart1-tx {
iomux {
pinmux = <0<<16 | RK_PA0 << 8 | 7>;
bias-disable;
};
rmio {
pinmux = <0 << 16 | 0 << 8 << | 1>;
};
};
If this requires some changes to the iomux driver to handle pinmux = <>;
as well and some code to handle subnodes for each pin controller,
that's fine. It's just work.
I need the DT bindings maintainers word on this, especially Conor
who has worked a bit on standardizing pin control bindings.
Yours,
Linus Walleij
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