linux-kernel - Re: [PATCH v5 3/4] misc: fastrpc: Expand context ID mask for DSP polling mode support

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Message-ID: <xrudy7p267tuu6q5qrndw35677noevqq23zooxmsacxlswzpub@2cqtvc6e3aw4>
Date: Tue, 6 Jan 2026 04:53:04 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Ekansh Gupta <ekansh.gupta@....qualcomm.com>
Cc: srini@...nel.org, linux-arm-msm@...r.kernel.org,
        gregkh@...uxfoundation.org, quic_bkumar@...cinc.com,
        linux-kernel@...r.kernel.org, quic_chennak@...cinc.com,
        dri-devel@...ts.freedesktop.org, arnd@...db.de,
        konrad.dybcio@....qualcomm.com
Subject: Re: [PATCH v5 3/4] misc: fastrpc: Expand context ID mask for DSP
 polling mode support

On Tue, Dec 30, 2025 at 11:58:30AM +0530, Ekansh Gupta wrote:
> Current FastRPC context uses a 12-bit mask:
>   [ID(8 bits)][PD type(4 bits)] = GENMASK(11, 4)

Is it Linux-only representation or is it also used by the DSP? Will it
work with MSM8916?

> 
> This works for normal calls but fails for DSP polling mode.
> Polling mode expects a 16-bit layout:
>   [15:8] = context ID (8 bits)
>   [7:5]  = reserved
>   [4]    = async mode bit
>   [3:0]  = PD type (4 bits)
> 
> If async bit (bit 4) is set, DSP disables polling. With current
> mask, odd IDs can set this bit, causing DSP to skip poll updates.
> 
> Update FASTRPC_CTXID_MASK to GENMASK(15, 8) so IDs occupy upper
> byte and lower byte is left for DSP flags and PD type.
> 
> Reserved bits remain unused. This change is compatible with
> polling mode and does not break non-polling behavior.
> 
> Bit layout:
>   [15:8] = CCCCCCCC (context ID)
>   [7:5]  = xxx (reserved)
>   [4]    = A (async mode)
>   [3:0]  = PPPP (PD type)
> 
> Signed-off-by: Ekansh Gupta <ekansh.gupta@....qualcomm.com>
> ---
>  drivers/misc/fastrpc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 

-- 
With best wishes
Dmitry