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Message-Id: <20260106100000.225445-1-amadeus@jmu.edu.cn>
Date: Tue, 6 Jan 2026 18:00:00 +0800
From: Chukun Pan <amadeus@....edu.cn>
To: Heiko Stuebner <heiko@...ech.de>
Cc: Rob Herring <robh@...nel.org>,
Chukun Pan <amadeus@....edu.cn>,
Jonas Karlman <jonas@...boo.se>,
Conor Dooley <conor+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: [PATCH 1/1] arm64: dts: rockchip: Enable PCIe for ArmSoM Sige1
Enable the RTL8125 network controller and corresponding PHY
connected via PCIe on the ArmSoM Sige1.
Signed-off-by: Chukun Pan <amadeus@....edu.cn>
---
.../boot/dts/rockchip/rk3528-armsom-sige1.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts b/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts
index 6e21579365a5..c41af8fc0c8d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts
@@ -232,6 +232,10 @@ sdio_pwrseq: sdio-pwrseq {
};
};
+&combphy {
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <&vdd_arm>;
};
@@ -293,6 +297,14 @@ rgmii_phy: ethernet-phy@1 {
};
};
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie20_perstn>;
+ reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc_3v3>;
+ status = "okay";
+};
+
&pinctrl {
bluetooth {
bt_reg_on_h: bt-reg-on-h {
@@ -324,6 +336,12 @@ r_led: r-led {
};
};
+ pcie {
+ pcie20_perstn: pcie20-perstn {
+ rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
rtc {
rtc_int_l: rtc-int-l {
rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
--
2.25.1
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