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Message-ID: <158442b3-28c2-4f8c-ba42-0b9c6661c650@kernel.org>
Date: Wed, 7 Jan 2026 14:50:54 -0600
From: Mario Limonciello <superm1@...nel.org>
To: Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc: "open list:THUNDERBOLT DRIVER" <linux-usb@...r.kernel.org>,
 linux-kernel@...r.kernel.org, Andreas Noever <andreas.noever@...il.com>,
 Michael Jamet <michael.jamet@...el.com>,
 Yehezkel Bernat <YehezkelShB@...il.com>
Subject: Re: [PATCH v2 0/2] thunderbolt: Fix S4 resume incongruities

On 1/7/26 3:33 AM, Mika Westerberg wrote:
> Hi,
> 
> On Mon, Jan 05, 2026 at 11:37:47PM -0600, Mario Limonciello (AMD) wrote:
>> When a machine is restored from S4 if the firmware CM has created
>> tunnels there can be an incongruity of expectation from the kernel
>> when compared to booting from S5.  This series addresses those.
> 
> I suspect there is no Firmware CM in AMD platforms so this actually means
> the BIOS CM, correct?

That's correct.

> 
> However, on S4 we actually do reset host router when the "boot kernel" is
> started before loading and jumping to the hibernation image. 

That's only if thunderbolt.ko is built into the kernel or is included in 
the initramfs before it does the pivot to the hibernation image.

At least in the tests we were doing it's not part of the boot kernel.

> It might be
> that this boot kernel tunnel configuration is causing the issues you are
> seeing (can you elaborate on those?) 

The issues manifest "downstream" in the GPU driver.  There are a bunch 
of aux failures and a non functional display.  Tracing it back the GPU 
driver isn't alive at the time that the tunnels are attempted to be 
reconstructed at the moment and so CM tears DP tunnel down and then when 
GPU driver does come up it is not functional.

DP tunnel constructed at:

[  486.007194] thunderbolt 0000:c6:00.6: AUX RX path activation complete

First DPRx timeout at:

[  486.135483] thunderbolt 0000:c6:00.6: 0:6 <-> 2:13 (DP): DPRX read 
timeout

DP tunnel deactivating at:

  [  486.331856] thunderbolt 0000:c6:00.6: 0:6 <-> 2:13 (DP): deactivating

First DPRx DPCD reading starts at:

[  486.351765] amdgpu 0000:c4:00.0: amdgpu: [drm] DPIA AUX failed on 
0xf0000(10), error 7

I believe by doing the reset in this series we instead get HPD events 
and react to those.  If we keep things as they are today I think we need 
to work out some changes to device ordering.

> but given that it is (typically the
> same kernel binary) it should be creating the tunnels the same way.
> 
>>
>> v1:
>> Link: https://lore.kernel.org/linux-usb/20251023050354.115015-1-superm1@kernel.org/
>>
>> Mario Limonciello (AMD) (2):
>>    thunderbolt: Move nhi_reset before pmops declaration
>>    thunderbolt: Reset NHI during S4 restore_noirq() callback
>>
>>   drivers/thunderbolt/nhi.c | 77 ++++++++++++++++++++++-----------------
>>   drivers/thunderbolt/tb.c  | 29 ++++++++-------
>>   drivers/thunderbolt/tb.h  |  1 +
>>   3 files changed, 61 insertions(+), 46 deletions(-)
>>
>> -- 
>> 2.43.0


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