linux-kernel - [PATCH v2] clk: qcom: dispcc-sdm845: Enable parents for pixel clocks

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Message-Id: <20260107-stability-discussion-v2-1-ef7717b435ff@protonmail.com>
Date: Wed, 07 Jan 2026 12:44:43 +0100
From: Petr Hodina via B4 Relay <devnull+petr.hodina.protonmail.com@...nel.org>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>, 
 Rob Clark <robin.clark@....qualcomm.com>, 
 Dmitry Baryshkov <lumag@...nel.org>, 
 Abhinav Kumar <abhinav.kumar@...ux.dev>, 
 Jessica Zhang <jesszhan0024@...il.com>, Sean Paul <sean@...rly.run>, 
 Marijn Suijten <marijn.suijten@...ainline.org>, 
 David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>, 
 Bjorn Andersson <andersson@...nel.org>, 
 Michael Turquette <mturquette@...libre.com>, 
 Stephen Boyd <sboyd@...nel.org>, Petr Hodina <petr.hodina@...tonmail.com>, 
 David Heidelberg <david@...t.cz>, Taniya Das <quic_tdas@...cinc.com>
Cc: linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org, 
 freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org, 
 linux-clk@...r.kernel.org, phone-devel@...r.kernel.org
Subject: [PATCH v2] clk: qcom: dispcc-sdm845: Enable parents for pixel
 clocks

From: Petr Hodina <petr.hodina@...tonmail.com>

Add CLK_OPS_PARENT_ENABLE to MDSS pixel clock sources to ensure parent
clocks are enabled during clock operations, preventing potential
stability issues during display configuration.

Fixes: 81351776c9fb ("clk: qcom: Add display clock controller driver for SDM845")
Signed-off-by: Petr Hodina <petr.hodina@...tonmail.com>
---
We are currently running the latest linux-next snapshots (next-202511*
and next-202512*) and have encountered random freezes and crashes on the
Pixel 3, as well as crash dumps on the OnePlus 6 and 6T.

This commit fixes the stability issue. I've checked other SDM dispcc
files and they also contain this configuration.

For safety I also set the configuration for `disp_cc_mdss_pclk1_clk_src`
though it should be sufficient only for `disp_cc_mdss_pclk0_clk_src`.

Kind regards,
Petr
---
Changes in v2:
- Remove commits from v1 and introduce proper fix.
- Link to v1: https://lore.kernel.org/r/20251213-stability-discussion-v1-0-b25df8453526@ixit.cz
---
 drivers/clk/qcom/dispcc-sdm845.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c
index 2f9e9665d7e9..78e43f6d7502 100644
--- a/drivers/clk/qcom/dispcc-sdm845.c
+++ b/drivers/clk/qcom/dispcc-sdm845.c
@@ -280,7 +280,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk0_clk_src = {
 		.name = "disp_cc_mdss_pclk0_clk_src",
 		.parent_data = disp_cc_parent_data_4,
 		.num_parents = ARRAY_SIZE(disp_cc_parent_data_4),
-		.flags = CLK_SET_RATE_PARENT,
+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
 		.ops = &clk_pixel_ops,
 	},
 };
@@ -295,7 +295,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = {
 		.name = "disp_cc_mdss_pclk1_clk_src",
 		.parent_data = disp_cc_parent_data_4,
 		.num_parents = ARRAY_SIZE(disp_cc_parent_data_4),
-		.flags = CLK_SET_RATE_PARENT,
+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
 		.ops = &clk_pixel_ops,
 	},
 };

---
base-commit: f96074c6d01d8a5e9e2fccd0bba5f2ed654c1f2d
change-id: 20251212-stability-discussion-d16f6ac51209

Best regards,
-- 
Petr Hodina <petr.hodina@...tonmail.com>