linux-kernel - Re: [PATCH v4 4/5] KVM: selftests: arm64: Skip all 32 bit IDs when set_id

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Message-ID: <e1907b3a-416e-42d1-a682-4ea514572b64@sirena.org.uk>
Date: Wed, 7 Jan 2026 11:44:55 +0000
From: Mark Brown <broonie@...nel.org>
To: Ben Horgan <ben.horgan@....com>
Cc: Marc Zyngier <maz@...nel.org>, Joey Gouly <joey.gouly@....com>,
	Suzuki K Poulose <suzuki.poulose@....com>,
	Paolo Bonzini <pbonzini@...hat.com>, Shuah Khan <shuah@...nel.org>,
	Oliver Upton <oupton@...nel.org>,
	linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.linux.dev,
	kvm@...r.kernel.org, linux-kselftest@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 4/5] KVM: selftests: arm64: Skip all 32 bit IDs when
 set_id_regs is aarch64 only

On Wed, Jan 07, 2026 at 09:54:58AM +0000, Ben Horgan wrote:

> Not touched in this patch but the check for aarch64_only looks suspect to me.

> From main()
> val = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64PFR0_EL1));
> el0 = FIELD_GET(ID_AA64PFR0_EL1_EL0, val);
> aarch64_only = (el0 == ID_AA64PFR0_EL1_EL0_IMP);

> As we are concerned with system registers that are accessible from EL1 and higher
> should this not be checking ID_AA64PFR0_EL1_EL1 rather than ID_AA64PFR0_EL1_EL0?
> Not sure if it makes sense for the two to be different though.

The affected registers are ID registers so they're always physically
readable, the entire ID space is always accessible (the otherwise
unspecified registers read as zero), and if you think about it for a
system with AArch32 only at EL0 you still need to know what the EL0
features are from EL1.  Like you say it's a preexisting thing either
way.

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