linux-kernel - Re: [PATCH] arm64: dts: renesas: rzt2h-n2h-evk-common: Use GPIO for SD0 write protect

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Message-ID: <CAMuHMdUrQR2rSHw-n2_CYCtRqF6JtHoguWWpxxVb=Sc6VoujBQ@mail.gmail.com>
Date: Thu, 8 Jan 2026 15:04:54 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Magnus Damm <magnus.damm@...il.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>, 
	Wolfram Sang <wsa+renesas@...g-engineering.com>
Subject: Re: [PATCH] arm64: dts: renesas: rzt2h-n2h-evk-common: Use GPIO for
 SD0 write protect

Hi Prabhakar,

CC wsa

On Tue, 6 Jan 2026 at 14:13, Prabhakar <prabhakar.csengg@...il.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Switch SD0 write-protect detection to a GPIO on the RZ/T2H and RZ/N2H
> EVKs. Both boards use a full-size SD card slot on the SD0 channel with
> a dedicated WP pin.
>
> The RZ/T2H and RZ/N2H SoCs use of_data_rcar_gen3, which sets
> MMC_CAP2_NO_WRITE_PROTECT and causes the core to ignore the WP signal
> unless a wp-gpios property is provided. Describe the WP pin as a GPIO
> to allow the MMC core to evaluate the write-protect status correctly.
>
> Fixes: d065453e5ee0 ("arm64: dts: renesas: rzt2h-rzn2h-evk: Enable SD card slot")
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>

In light of commit ef5332c10d4f332a ("mmc: renesas_sdhi: really fix
WP logic regressions"), this LGTM so
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-devel for v6.20.

> --- a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
> @@ -380,8 +380,7 @@ data-pins {
>                 ctrl-pins {
>                         pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>, /* SD0_CLK */
>                                  <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */
> -                                <RZT2H_PORT_PINMUX(22, 5, 0x29)>, /* SD0_CD */
> -                                <RZT2H_PORT_PINMUX(22, 6, 0x29)>; /* SD0_WP */
> +                                <RZT2H_PORT_PINMUX(22, 5, 0x29)>; /* SD0_CD */
>                 };
>         };
>
> @@ -491,6 +490,7 @@ &sdhi0 {
>         pinctrl-names = "default", "state_uhs";
>         vmmc-supply = <&reg_3p3v>;
>         vqmmc-supply = <&vqmmc_sdhi0>;
> +       wp-gpios = <&pinctrl RZT2H_GPIO(22, 6) GPIO_ACTIVE_HIGH>;
>         bus-width = <4>;
>         sd-uhs-sdr50;
>         sd-uhs-sdr104;

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds