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Message-ID: <a0d802a1e450860a9859ce3d456fcce81dde8ba3.camel@codeconstruct.com.au>
Date: Thu, 08 Jan 2026 15:16:19 +1030
From: Andrew Jeffery <andrew@...econstruct.com.au>
To: Kevin Tung <kevin.tung.openbmc@...il.com>, Rob Herring
<robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Joel Stanley <joel@....id.au>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org, Amithash
Prasasd <amithash@...a.com>, Kevin Tung <Kevin.Tung@...ntatw.com>, Ken
Chen <Ken.Chen@...ntatw.com>, Leo Yang <Leo-Yang@...ntatw.com>, Jackson
Liu <Jackson.Liu@...ntatw.com>
Subject: Re: [PATCH] ARM: dts: aspeed: yosemite5: add x4 E1.S expansion
board I2C mux
On Mon, 2025-12-22 at 19:25 +0800, Kevin Tung wrote:
> The new hardware design adds two additional E1.S devices behind an
> I2C mux at address 0x73 on bus 10. Add support for this mux in the
> DTS device tree.
Out of curiosity, you're monitoring them with the NVMe-MI basic
management command and not NVMe-MI over MCTP, or is there something
else going on which motivates describing empty mux legs?
Andrew
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