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Message-ID: <CABh9gBfdNnWVUy2+pdMZWjt+mgKCV3TxZei3V_cPTp1z1fguEw@mail.gmail.com>
Date: Fri, 30 Jan 2026 16:40:03 +0800
From: Kevin Tung <kevin.tung.openbmc@...il.com>
To: Andrew Jeffery <andrew@...econstruct.com.au>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
	Conor Dooley <conor+dt@...nel.org>, Joel Stanley <joel@....id.au>, devicetree@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, linux-aspeed@...ts.ozlabs.org, 
	linux-kernel@...r.kernel.org, Amithash Prasasd <amithash@...a.com>, 
	Kevin Tung <Kevin.Tung@...ntatw.com>, Ken Chen <Ken.Chen@...ntatw.com>, 
	Leo Yang <Leo-Yang@...ntatw.com>, Jackson Liu <Jackson.Liu@...ntatw.com>
Subject: Re: [PATCH] ARM: dts: aspeed: yosemite5: add x4 E1.S expansion board
 I2C mux

On Thu, Jan 8, 2026 at 12:46 PM Andrew Jeffery
<andrew@...econstruct.com.au> wrote:
>
> On Mon, 2025-12-22 at 19:25 +0800, Kevin Tung wrote:
> > The new hardware design adds two additional E1.S devices behind an
> > I2C mux at address 0x73 on bus 10. Add support for this mux in the
> > DTS device tree.
>
> Out of curiosity, you're monitoring them with the NVMe-MI basic
> management command and not NVMe-MI over MCTP, or is there something
> else going on which motivates describing empty mux legs?
>
> Andrew

Hi Andrew,

We’re monitoring them using the NVMe-MI basic management commands
directly, which is why the empty mux legs are described.

Kevin

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