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Message-ID: <zj2vpruzoeyvyyzxiqcffajyhpmem4q75l6gzgxd4jgaizhrdq@bxuudn4kyvr3>
Date: Thu, 8 Jan 2026 07:05:15 +0100
From: Uwe Kleine-König <ukleinek@...nel.org>
To: Sean Nyekjaer <sean@...nix.com>
Cc: Fabrice Gasnier <fabrice.gasnier@...s.st.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>, Alexandre Torgue <alexandre.torgue@...s.st.com>,
linux-pwm@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH] pwm: stm32: handle polarity change when PWM is enabled
Hello Sean,
On Wed, Jan 07, 2026 at 04:05:56PM +0000, Sean Nyekjaer wrote:
> On Wed, Jan 07, 2026 at 04:54:46PM +0100, Uwe Kleine-König wrote:
> > On Tue, Jan 06, 2026 at 11:30:34AM +0000, Sean Nyekjaer wrote:
> > > On Tue, Jan 06, 2026 at 11:22:57AM +0100, Uwe Kleine-König wrote:
> > > > On Tue, Jan 06, 2026 at 08:01:57AM +0100, Sean Nyekjaer wrote:
> > > > > After commit 7346e7a058a2 ("pwm: stm32: Always do lazy disabling"),
> > > > > polarity changes are ignored. Updates to the TIMx_CCER CCxP bits are
> > > > > ignored by the hardware when the master output is enabled via the
> > > > > TIMx_BDTR MOE bit.
> > > > [...]
> > > > I have hardware using this driver, will set it up later this week for
> > > > testing.
> > >
> > > Very cool, looking forward to hear if you can re-produce.
> >
> > I cannot. I have:
> >
> > # uname -r
> > 6.11.0-rc1-00028-geb18504ca5cf-dirty
> >
> > (the -dirty is only from enabling the pwm for my machine, no driver
> > changes)
> >
> > # cat /sys/kernel/debug/pwm
> > 0: platform/40001000.timer:pwm, 4 PWM devices
> > ...
> > pwm-3 (sysfs ): requested enabled period: 313720 ns duty: 10000 ns polarity: normal
> >
> > and pulseview/sigrok detects 3.187251% with a period of 313.8 µs.
> >
> > After
> >
> > echo inversed > /sys/class/pwm/pwmchip0/pwm3/polarity
> >
> > the output changes to
> >
> > # cat /sys/kernel/debug/pwm
> > 0: platform/40001000.timer:pwm, 4 PWM devices
> > ...
> > pwm-3 (sysfs ): requested enabled period: 313720 ns duty: 10000 ns polarity: inverse
> >
> > and pulseview/sigrok claims 96.812749% with a period of 313.8 µs.
> > So the polarity change happend as expected.
> >
> > This is on an st,stm32mp135f-dk board.
> >
> > Where is the difference to your observations?
> >
>
> Thanks for taking a look!
> I'm using the PWM for a backlight. With this [0] in my dts:
>
> [0]:
> backlight: backlight {
> compatible = "pwm-backlight";
> pwms = <&pwm4 0 125000 PWM_POLARITY_INVERTED>;
> brightness-levels = <102 235 255>;
> default-brightness-level = <80>;
> num-interpolated-steps = <100>;
> enable-gpios = <&gpiof 12 GPIO_ACTIVE_LOW>;
> status = "okay";
> };
>
> Maybe that is doing something differently.
What is the actual problem you have? I assume it's the backlight being
off after boot? Does it start working if you disable and reenable?
Can you please boot with
trace_event=pwm
on the command line and provide /sys/kernel/debug/tracing/trace from
after the problem happend?
Best regards
Uwe
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