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Message-ID: <20260109155843.GA547188@bhelgaas>
Date: Fri, 9 Jan 2026 09:58:43 -0600
From: Bjorn Helgaas <helgaas@...nel.org>
To: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org, mani@...nel.org
Subject: Re: [PATCH] PCI: Add ACS quirk for Qualcomm Hamoa & Glymur
On Fri, Jan 09, 2026 at 01:53:32PM +0530, Krishna Chaitanya Chundru wrote:
> The Qualcomm Hamoa & Glymur root ports don't advertise an ACS capability,
> but they do provide ACS-like features to disable peer transactions and
> validate bus numbers in requests.
>
> So add an ACS quirk for Hamoa & Glymur.
>
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
Applied to pci/virtualization for v6.20, thanks!
> ---
> drivers/pci/quirks.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index b9c252aa6fe08a864cebe245f5dd7bf41fcc5116..75dee46f474a643cc79d112df1f5a57a9f6b95b1 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -5107,6 +5107,10 @@ static const struct pci_dev_acs_enabled {
> { PCI_VENDOR_ID_QCOM, 0x0401, pci_quirk_qcom_rp_acs },
> /* QCOM SA8775P root port */
> { PCI_VENDOR_ID_QCOM, 0x0115, pci_quirk_qcom_rp_acs },
> + /* QCOM Hamoa root port */
> + { PCI_VENDOR_ID_QCOM, 0x0111, pci_quirk_qcom_rp_acs },
> + /* QCOM Glymur root port */
> + { PCI_VENDOR_ID_QCOM, 0x0120, pci_quirk_qcom_rp_acs },
> /* HXT SD4800 root ports. The ACS design is same as QCOM QDF2xxx */
> { PCI_VENDOR_ID_HXT, 0x0401, pci_quirk_qcom_rp_acs },
> /* Intel PCH root ports */
>
> ---
> base-commit: 623fb9912f6af600cda3b6bd166ac738c1115ef4
> change-id: 20260109-acs_quirk-0f8e83dc945e
>
> Best regards,
> --
> Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
>
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