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Message-ID: <4ae22253-455e-44ef-8774-47dfae3c4674@kernel.org>
Date: Fri, 9 Jan 2026 08:36:56 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: hehuan1@...incomputing.com, adrian.hunter@...el.com,
ulf.hansson@...aro.org, linux-mmc@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: ningyu@...incomputing.com, linmin@...incomputing.com,
pinkesh.vaghela@...fochips.com, xuxiang@...incomputing.com
Subject: Re: [PATCH v1] mmc: sdhci-of-dwcmshc: fix init for AXI clock and DMA
128MB boundary
On 09/01/2026 04:28, hehuan1@...incomputing.com wrote:
> From: Huan He <hehuan1@...incomputing.com>
>
> 1.Accessing the High-Speed registers requires the AXI clock to be enabled.
> 2.This DWC MSHC has a 128MB limitation where the data buffer size and
> start address must not exceed the 128MB boundary. Registering the
> missing 'adma_write_desc' callback function.
>
> Signed-off-by: Huan He <hehuan1@...incomputing.com>
> ---
> drivers/mmc/host/sdhci-of-dwcmshc.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index 51949cde0958..147f8046707f 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -1588,6 +1588,7 @@ static int eic7700_init(struct device *dev, struct sdhci_host *host, struct dwcm
> {
> u32 emmc_caps = MMC_CAP2_NO_SD | MMC_CAP2_NO_SDIO;
> unsigned int val, hsp_int_status, hsp_pwr_ctrl;
> + static const char * const clk_ids[] = {"axi"};
> struct of_phandle_args args;
> struct eic7700_priv *priv;
> struct regmap *hsp_regmap;
> @@ -1605,6 +1606,11 @@ static int eic7700_init(struct device *dev, struct sdhci_host *host, struct dwcm
> return ret;
> }
>
> + ret = dwcmshc_get_enable_other_clks(mmc_dev(host->mmc), dwc_priv,
> + ARRAY_SIZE(clk_ids), clk_ids);
Is this clock (ABI) already documented?
Best regards,
Krzysztof
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