linux-kernel - Re: [PATCH v9 loongarch-next 2/4] LoongArch: Add SCQ support detection

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Message-ID: <CAAhV-H4ayU6xLbSVpTZhM9=TN19MpGZZkmi2eNXLHpEMWNQe0g@mail.gmail.com>
Date: Sat, 10 Jan 2026 12:11:53 +0800
From: Huacai Chen <chenhuacai@...nel.org>
To: George Guo <dongtai.guo@...ux.dev>
Cc: hengqi.chen@...il.com, kernel@...0n.name, lianyangyang@...inos.cn, 
	linux-kernel@...r.kernel.org, loongarch@...ts.linux.dev, r@....cc, 
	xry111@...111.site, George Guo <guodongtai@...inos.cn>
Subject: Re: [PATCH v9 loongarch-next 2/4] LoongArch: Add SCQ support detection

Hi, George,

On Mon, Jan 5, 2026 at 6:55 PM George Guo <dongtai.guo@...ux.dev> wrote:
>
> From: George Guo <guodongtai@...inos.cn>
>
> Check CPUCFG2_SCQ bit to determine if the CPU supports
> SCQ instruction.
>
> Co-developed-by: Yangyang Lian <lianyangyang@...inos.cn>
> Signed-off-by: Yangyang Lian <lianyangyang@...inos.cn>
> Reviewed-by: Hengqi Chen <hengqi.chen@...il.com>
> Tested-by: Hengqi Chen <hengqi.chen@...il.com>
> Signed-off-by: George Guo <guodongtai@...inos.cn>
> ---
>  arch/loongarch/include/asm/cpu-features.h | 1 +
>  arch/loongarch/include/asm/cpu.h          | 2 ++
>  arch/loongarch/include/uapi/asm/hwcap.h   | 1 +
>  arch/loongarch/kernel/cpu-probe.c         | 4 ++++
>  arch/loongarch/kernel/proc.c              | 2 ++
>  5 files changed, 10 insertions(+)
>
> diff --git a/arch/loongarch/include/asm/cpu-features.h b/arch/loongarch/include/asm/cpu-features.h
> index 3745d991a99a..39c7fe64c3ef 100644
> --- a/arch/loongarch/include/asm/cpu-features.h
> +++ b/arch/loongarch/include/asm/cpu-features.h
> @@ -67,5 +67,6 @@
>  #define cpu_has_msgint         cpu_opt(LOONGARCH_CPU_MSGINT)
>  #define cpu_has_avecint                cpu_opt(LOONGARCH_CPU_AVECINT)
>  #define cpu_has_redirectint    cpu_opt(LOONGARCH_CPU_REDIRECTINT)
> +#define cpu_has_scq            cpu_opt(LOONGARCH_CPU_SCQ)
>
>  #endif /* __ASM_CPU_FEATURES_H */
> diff --git a/arch/loongarch/include/asm/cpu.h b/arch/loongarch/include/asm/cpu.h
> index f3efb00b6141..5531039027ec 100644
> --- a/arch/loongarch/include/asm/cpu.h
> +++ b/arch/loongarch/include/asm/cpu.h
> @@ -125,6 +125,7 @@ static inline char *id_to_core_name(unsigned int id)
>  #define CPU_FEATURE_MSGINT             29      /* CPU has MSG interrupt */
>  #define CPU_FEATURE_AVECINT            30      /* CPU has AVEC interrupt */
>  #define CPU_FEATURE_REDIRECTINT                31      /* CPU has interrupt remapping */
> +#define CPU_FEATURE_SCQ                        32      /* CPU has SC.Q instruction */
>
>  #define LOONGARCH_CPU_CPUCFG           BIT_ULL(CPU_FEATURE_CPUCFG)
>  #define LOONGARCH_CPU_LAM              BIT_ULL(CPU_FEATURE_LAM)
> @@ -158,5 +159,6 @@ static inline char *id_to_core_name(unsigned int id)
>  #define LOONGARCH_CPU_MSGINT           BIT_ULL(CPU_FEATURE_MSGINT)
>  #define LOONGARCH_CPU_AVECINT          BIT_ULL(CPU_FEATURE_AVECINT)
>  #define LOONGARCH_CPU_REDIRECTINT      BIT_ULL(CPU_FEATURE_REDIRECTINT)
> +#define LOONGARCH_CPU_SCQ              BIT_ULL(CPU_FEATURE_SCQ)
>
>  #endif /* _ASM_CPU_H */
> diff --git a/arch/loongarch/include/uapi/asm/hwcap.h b/arch/loongarch/include/uapi/asm/hwcap.h
> index 2b34e56cfa9e..a3c570d407b9 100644
> --- a/arch/loongarch/include/uapi/asm/hwcap.h
> +++ b/arch/loongarch/include/uapi/asm/hwcap.h
> @@ -18,5 +18,6 @@
>  #define HWCAP_LOONGARCH_LBT_MIPS       (1 << 12)
>  #define HWCAP_LOONGARCH_PTW            (1 << 13)
>  #define HWCAP_LOONGARCH_LSPW           (1 << 14)
> +#define HWCAP_LOONGARCH_CPU_SCQ                (1 << 15)
>
>  #endif /* _UAPI_ASM_HWCAP_H */
> diff --git a/arch/loongarch/kernel/cpu-probe.c b/arch/loongarch/kernel/cpu-probe.c
> index 08a227034042..0051f2fcd3ec 100644
> --- a/arch/loongarch/kernel/cpu-probe.c
> +++ b/arch/loongarch/kernel/cpu-probe.c
> @@ -205,6 +205,10 @@ static void cpu_probe_common(struct cpuinfo_loongarch *c)
>                 c->options |= LOONGARCH_CPU_PTW;
>                 elf_hwcap |= HWCAP_LOONGARCH_PTW;
>         }
> +       if (config & CPUCFG2_SCQ) {
> +               c->options |= LOONGARCH_CPU_SCQ;
> +               elf_hwcap |= HWCAP_LOONGARCH_CPU_SCQ;
> +       }
>         if (config & CPUCFG2_LSPW) {
>                 c->options |= LOONGARCH_CPU_LSPW;
>                 elf_hwcap |= HWCAP_LOONGARCH_LSPW;
> diff --git a/arch/loongarch/kernel/proc.c b/arch/loongarch/kernel/proc.c
> index 1d646da010f9..1b9cc05d1f33 100644
> --- a/arch/loongarch/kernel/proc.c
> +++ b/arch/loongarch/kernel/proc.c
> @@ -90,6 +90,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
>                 seq_puts(m, " lbt_arm");
>         if (cpu_has_lbt_mips)
>                 seq_puts(m, " lbt_mips");
> +       if (cpu_has_scq)
> +               seq_puts(m, " scq");
Please move this lines to be after "lam" since they are similar, so
does that in cpu-probe.c


Huacai

>         seq_puts(m, "\n");
>
>         seq_printf(m, "Hardware Watchpoint\t: %s", str_yes_no(cpu_has_watch));
> --
> 2.43.0
>