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Message-ID: <CAEg-Je-HQX+gn6btg2XdSWksKT_LWiZALHYUut6g=nLNyyss-g@mail.gmail.com> Date: Sat, 10 Jan 2026 11:17:32 -0500 From: Neal Gompa <neal@...pa.dev> To: Nick Chan <towinchenmi@...il.com> Cc: Will Deacon <will@...nel.org>, Mark Rutland <mark.rutland@....com>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Catalin Marinas <catalin.marinas@....com>, Janne Grunau <j@...nau.net>, Sven Peter <sven@...nel.org>, Marc Zyngier <maz@...nel.org>, linux-arm-kernel@...ts.infradead.org, linux-perf-users@...r.kernel.org, devicetree@...r.kernel.org, asahi@...ts.linux.dev, linux-kernel@...r.kernel.org, Ivaylo Ivanov <ivo.ivanov.ivanov1@...il.com>, Krzysztof Kozlowski <krzk@...nel.org> Subject: Re: [PATCH v10 00/21] drivers/perf: apple_m1: Add Apple A7-A11, T2 SoC support On Thu, Jan 1, 2026 at 4:02 AM Nick Chan <towinchenmi@...il.com> wrote: > > This series adds support for the CPU PMU in the older Apple A7-A11, T2 > SoCs. These PMUs may have a different event layout, less counters, or > deliver their interrupts via IRQ instead of a FIQ. Since some of those > older SoCs support 32-bit EL0, counting for 32-bit EL0 also need to > be enabled by the driver where applicable. > > Patch 1 adds the DT bindings. > Patch 2-7 prepares the driver to allow adding support for those > older SoCs. > Patch 8-12 adds support for the older SoCs. > Patch 13-21 are the DT changes. > > Happy new year 2026! > > Signed-off-by: Nick Chan <towinchenmi@...il.com> > --- > Changes in v10: > - Modify apple_pmu_get_event_idx() to take the number of counters supported > on the current PMU, which allows `perf record` to work correctly on A7-A9 > with 8 counters in the PMU. > - Rename the added counters to nr_counters in apple_pmu_init() > - Link to v9: https://lore.kernel.org/r/20251218-apple-cpmu-v9-0-4deadbe65d03@gmail.com > > Changes in v9: > - Rebased on top of v6.19-rc1 > - Removed non-existent "INST_A32" and "INST_T32" events from Apple A11 > - Added "INST_A32" and "INST_T32" event affinities for A9 and A10 > - Link to v8: https://lore.kernel.org/r/20250811-apple-cpmu-v8-0-c560ebd9ca46@gmail.com > > Changes in v8: > - Rebased on top of v6.17-rc1 > - Collect Ivaylo's Tested-by > - Drop #define PMCR1_COUNT_A64_EL3_0_7 > - Reword reason to not initialize PMUv3 remap in EL1 > - Link to v7: https://lore.kernel.org/r/20250510-apple-cpmu-v7-0-bd505cb6c520@gmail.com > > Changes in v7: > - Fix a W=1 compile warning in apple_pmu_get_event_idx() as appearently using GENMASK() > in a function prototype causes a warning in GCC. > - Link to v6: https://lore.kernel.org/r/20250407-apple-cpmu-v6-0-ae8c2f225c1f@gmail.com > > Changes in v6: > - Rebased on top of v6.15-rc1 (Conflict with FEAT_PMUv3 support for KVM on Apple Hardware) > - Add patch to skip initialization of PMUv3 remap in EL1 even though not strictly needed > - Include DT patches > - Link to v5: https://lore.kernel.org/r/20250228-apple-cpmu-v5-0-9e124cd28ed4@gmail.com > > Changes in v5: > - Slightly change "drivers/perf: apple_m1: Add Apple A11 Support", to keep things in > chronological order. > - Link to v4: https://lore.kernel.org/r/20250214-apple-cpmu-v4-0-ffca0e45147e@gmail.com > > Changes in v4: > - Support per-implementation event attr group > - Fix Apple A7 event attr groups > - Link to v3: https://lore.kernel.org/r/20250213-apple-cpmu-v3-0-be7f8aded81f@gmail.com > > Changes in v3: > - Configure PMC8 and PMC9 for 32-bit EL0 > - Remove redundant _common suffix from shared functions > - Link to v2: https://lore.kernel.org/r/20250213-apple-cpmu-v2-0-87b361932e88@gmail.com > > Changes in v2: > - Remove unused flags parameter from apple_pmu_init_common() > - Link to v1: https://lore.kernel.org/r/20250212-apple-cpmu-v1-0-f8c7f2ac1743@gmail.com > > --- > Nick Chan (21): > dt-bindings: arm: pmu: Add Apple A7-A11 SoC CPU PMU compatibles > drivers/perf: apple_m1: Only init PMUv3 remap when EL2 is available > drivers/perf: apple_m1: Support per-implementation event tables > drivers/perf: apple_m1: Support a per-implementation number of counters > drivers/perf: apple_m1: Support configuring counters for 32-bit EL0 > drivers/perf: apple_m1: Support per-implementation PMU startup > drivers/perf: apple_m1: Support per-implementation event attr group > drivers/perf: apple_m1: Add Apple A7 support > drivers/perf: apple_m1: Add Apple A8/A8X support > drivers/perf: apple_m1: Add A9/A9X support > drivers/perf: apple_m1: Add Apple A10/A10X/T2 Support > drivers/perf: apple_m1: Add Apple A11 Support > arm64: dts: apple: s5l8960x: Add CPU PMU nodes > arm64: dts: apple: t7000: Add CPU PMU nodes > arm64: dts: apple: t7001: Add CPU PMU nodes > arm64: dts: apple: s800-0-3: Add CPU PMU nodes > arm64: dts: apple: s8001: Add CPU PMU nodes > arm64: dts: apple: t8010: Add CPU PMU nodes > arm64: dts: apple: t8011: Add CPU PMU nodes > arm64: dts: apple: t8012: Add CPU PMU nodes > arm64: dts: apple: t8015: Add CPU PMU nodes > > Documentation/devicetree/bindings/arm/pmu.yaml | 6 + > arch/arm64/boot/dts/apple/s5l8960x.dtsi | 8 + > arch/arm64/boot/dts/apple/s800-0-3.dtsi | 8 + > arch/arm64/boot/dts/apple/s8001.dtsi | 8 + > arch/arm64/boot/dts/apple/t7000.dtsi | 8 + > arch/arm64/boot/dts/apple/t7001.dtsi | 9 + > arch/arm64/boot/dts/apple/t8010.dtsi | 8 + > arch/arm64/boot/dts/apple/t8011.dtsi | 9 + > arch/arm64/boot/dts/apple/t8012.dtsi | 8 + > arch/arm64/boot/dts/apple/t8015.dtsi | 24 + > arch/arm64/include/asm/apple_m1_pmu.h | 2 + > drivers/perf/apple_m1_cpu_pmu.c | 820 +++++++++++++++++++++++-- > 12 files changed, 883 insertions(+), 35 deletions(-) > --- > base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8 > change-id: 20250211-apple-cpmu-5a5a3da39483 > Seems reasonable to me. Acked-by: Neal Gompa <neal@...pa.dev> -- 真実はいつも一つ！/ Always, there's only one truth!
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