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Message-ID: <20260113023828.790136-1-inochiama@gmail.com>
Date: Tue, 13 Jan 2026 10:38:26 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Paul Walmsley <pjw@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Alexandre Ghiti <alex@...ti.fr>,
Chen Wang <unicorn_wang@...look.com>,
Inochi Amaoto <inochiama@...il.com>,
Han Gao <rabenda.cn@...il.com>,
Nutty Liu <liujingqi@...xincomputing.com>,
Thomas Gleixner <tglx@...utronix.de>,
Zixian Zeng <sycamoremoon376@...il.com>
Cc: devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org,
sophgo@...ts.linux.dev,
linux-kernel@...r.kernel.org,
Yixun Lan <dlan@...too.org>,
Longbin Li <looong.bin@...il.com>
Subject: [PATCH 1/2] riscv: dts: sophgo: Move PLIC and CLINT node into CPU dtsi
As we have a separate CPU dtsi file, move the PLIC and CLINT
node to the CPU dtsi file. This will make the sg2042.dtsi force
peripheral devices, and make the CPU dtsi force CPU related
devices.
Signed-off-by: Inochi Amaoto <inochiama@...il.com>
---
arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi | 305 ++++++++++++++++++++
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 303 -------------------
2 files changed, 305 insertions(+), 303 deletions(-)
diff --git a/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi b/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi
index 94a4b71acad3..509488eee432 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi
@@ -2189,4 +2189,309 @@ l2_cache15: cache-controller-15 {
cache-unified;
};
};
+
+ soc {
+ intc: interrupt-controller@...0000000 {
+ compatible = "sophgo,sg2042-plic", "thead,c900-plic";
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x00000070 0x90000000 0x00000000 0x04000000>;
+ interrupt-controller;
+ interrupts-extended =
+ <&cpu0_intc 11>, <&cpu0_intc 9>,
+ <&cpu1_intc 11>, <&cpu1_intc 9>,
+ <&cpu2_intc 11>, <&cpu2_intc 9>,
+ <&cpu3_intc 11>, <&cpu3_intc 9>,
+ <&cpu4_intc 11>, <&cpu4_intc 9>,
+ <&cpu5_intc 11>, <&cpu5_intc 9>,
+ <&cpu6_intc 11>, <&cpu6_intc 9>,
+ <&cpu7_intc 11>, <&cpu7_intc 9>,
+ <&cpu8_intc 11>, <&cpu8_intc 9>,
+ <&cpu9_intc 11>, <&cpu9_intc 9>,
+ <&cpu10_intc 11>, <&cpu10_intc 9>,
+ <&cpu11_intc 11>, <&cpu11_intc 9>,
+ <&cpu12_intc 11>, <&cpu12_intc 9>,
+ <&cpu13_intc 11>, <&cpu13_intc 9>,
+ <&cpu14_intc 11>, <&cpu14_intc 9>,
+ <&cpu15_intc 11>, <&cpu15_intc 9>,
+ <&cpu16_intc 11>, <&cpu16_intc 9>,
+ <&cpu17_intc 11>, <&cpu17_intc 9>,
+ <&cpu18_intc 11>, <&cpu18_intc 9>,
+ <&cpu19_intc 11>, <&cpu19_intc 9>,
+ <&cpu20_intc 11>, <&cpu20_intc 9>,
+ <&cpu21_intc 11>, <&cpu21_intc 9>,
+ <&cpu22_intc 11>, <&cpu22_intc 9>,
+ <&cpu23_intc 11>, <&cpu23_intc 9>,
+ <&cpu24_intc 11>, <&cpu24_intc 9>,
+ <&cpu25_intc 11>, <&cpu25_intc 9>,
+ <&cpu26_intc 11>, <&cpu26_intc 9>,
+ <&cpu27_intc 11>, <&cpu27_intc 9>,
+ <&cpu28_intc 11>, <&cpu28_intc 9>,
+ <&cpu29_intc 11>, <&cpu29_intc 9>,
+ <&cpu30_intc 11>, <&cpu30_intc 9>,
+ <&cpu31_intc 11>, <&cpu31_intc 9>,
+ <&cpu32_intc 11>, <&cpu32_intc 9>,
+ <&cpu33_intc 11>, <&cpu33_intc 9>,
+ <&cpu34_intc 11>, <&cpu34_intc 9>,
+ <&cpu35_intc 11>, <&cpu35_intc 9>,
+ <&cpu36_intc 11>, <&cpu36_intc 9>,
+ <&cpu37_intc 11>, <&cpu37_intc 9>,
+ <&cpu38_intc 11>, <&cpu38_intc 9>,
+ <&cpu39_intc 11>, <&cpu39_intc 9>,
+ <&cpu40_intc 11>, <&cpu40_intc 9>,
+ <&cpu41_intc 11>, <&cpu41_intc 9>,
+ <&cpu42_intc 11>, <&cpu42_intc 9>,
+ <&cpu43_intc 11>, <&cpu43_intc 9>,
+ <&cpu44_intc 11>, <&cpu44_intc 9>,
+ <&cpu45_intc 11>, <&cpu45_intc 9>,
+ <&cpu46_intc 11>, <&cpu46_intc 9>,
+ <&cpu47_intc 11>, <&cpu47_intc 9>,
+ <&cpu48_intc 11>, <&cpu48_intc 9>,
+ <&cpu49_intc 11>, <&cpu49_intc 9>,
+ <&cpu50_intc 11>, <&cpu50_intc 9>,
+ <&cpu51_intc 11>, <&cpu51_intc 9>,
+ <&cpu52_intc 11>, <&cpu52_intc 9>,
+ <&cpu53_intc 11>, <&cpu53_intc 9>,
+ <&cpu54_intc 11>, <&cpu54_intc 9>,
+ <&cpu55_intc 11>, <&cpu55_intc 9>,
+ <&cpu56_intc 11>, <&cpu56_intc 9>,
+ <&cpu57_intc 11>, <&cpu57_intc 9>,
+ <&cpu58_intc 11>, <&cpu58_intc 9>,
+ <&cpu59_intc 11>, <&cpu59_intc 9>,
+ <&cpu60_intc 11>, <&cpu60_intc 9>,
+ <&cpu61_intc 11>, <&cpu61_intc 9>,
+ <&cpu62_intc 11>, <&cpu62_intc 9>,
+ <&cpu63_intc 11>, <&cpu63_intc 9>;
+ riscv,ndev = <224>;
+ };
+
+ clint_mswi: interrupt-controller@...4000000 {
+ compatible = "sophgo,sg2042-aclint-mswi", "thead,c900-aclint-mswi";
+ reg = <0x00000070 0x94000000 0x00000000 0x00004000>;
+ interrupts-extended = <&cpu0_intc 3>,
+ <&cpu1_intc 3>,
+ <&cpu2_intc 3>,
+ <&cpu3_intc 3>,
+ <&cpu4_intc 3>,
+ <&cpu5_intc 3>,
+ <&cpu6_intc 3>,
+ <&cpu7_intc 3>,
+ <&cpu8_intc 3>,
+ <&cpu9_intc 3>,
+ <&cpu10_intc 3>,
+ <&cpu11_intc 3>,
+ <&cpu12_intc 3>,
+ <&cpu13_intc 3>,
+ <&cpu14_intc 3>,
+ <&cpu15_intc 3>,
+ <&cpu16_intc 3>,
+ <&cpu17_intc 3>,
+ <&cpu18_intc 3>,
+ <&cpu19_intc 3>,
+ <&cpu20_intc 3>,
+ <&cpu21_intc 3>,
+ <&cpu22_intc 3>,
+ <&cpu23_intc 3>,
+ <&cpu24_intc 3>,
+ <&cpu25_intc 3>,
+ <&cpu26_intc 3>,
+ <&cpu27_intc 3>,
+ <&cpu28_intc 3>,
+ <&cpu29_intc 3>,
+ <&cpu30_intc 3>,
+ <&cpu31_intc 3>,
+ <&cpu32_intc 3>,
+ <&cpu33_intc 3>,
+ <&cpu34_intc 3>,
+ <&cpu35_intc 3>,
+ <&cpu36_intc 3>,
+ <&cpu37_intc 3>,
+ <&cpu38_intc 3>,
+ <&cpu39_intc 3>,
+ <&cpu40_intc 3>,
+ <&cpu41_intc 3>,
+ <&cpu42_intc 3>,
+ <&cpu43_intc 3>,
+ <&cpu44_intc 3>,
+ <&cpu45_intc 3>,
+ <&cpu46_intc 3>,
+ <&cpu47_intc 3>,
+ <&cpu48_intc 3>,
+ <&cpu49_intc 3>,
+ <&cpu50_intc 3>,
+ <&cpu51_intc 3>,
+ <&cpu52_intc 3>,
+ <&cpu53_intc 3>,
+ <&cpu54_intc 3>,
+ <&cpu55_intc 3>,
+ <&cpu56_intc 3>,
+ <&cpu57_intc 3>,
+ <&cpu58_intc 3>,
+ <&cpu59_intc 3>,
+ <&cpu60_intc 3>,
+ <&cpu61_intc 3>,
+ <&cpu62_intc 3>,
+ <&cpu63_intc 3>;
+ };
+
+ clint_mtimer0: timer@...c004000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac004000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu0_intc 7>,
+ <&cpu1_intc 7>,
+ <&cpu2_intc 7>,
+ <&cpu3_intc 7>;
+ };
+
+ clint_mtimer1: timer@...c014000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac014000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu4_intc 7>,
+ <&cpu5_intc 7>,
+ <&cpu6_intc 7>,
+ <&cpu7_intc 7>;
+ };
+
+ clint_mtimer2: timer@...c024000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac024000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu8_intc 7>,
+ <&cpu9_intc 7>,
+ <&cpu10_intc 7>,
+ <&cpu11_intc 7>;
+ };
+
+ clint_mtimer3: timer@...c034000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac034000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu12_intc 7>,
+ <&cpu13_intc 7>,
+ <&cpu14_intc 7>,
+ <&cpu15_intc 7>;
+ };
+
+ clint_mtimer4: timer@...c044000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac044000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu16_intc 7>,
+ <&cpu17_intc 7>,
+ <&cpu18_intc 7>,
+ <&cpu19_intc 7>;
+ };
+
+ clint_mtimer5: timer@...c054000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac054000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu20_intc 7>,
+ <&cpu21_intc 7>,
+ <&cpu22_intc 7>,
+ <&cpu23_intc 7>;
+ };
+
+ clint_mtimer6: timer@...c064000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac064000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu24_intc 7>,
+ <&cpu25_intc 7>,
+ <&cpu26_intc 7>,
+ <&cpu27_intc 7>;
+ };
+
+ clint_mtimer7: timer@...c074000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac074000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu28_intc 7>,
+ <&cpu29_intc 7>,
+ <&cpu30_intc 7>,
+ <&cpu31_intc 7>;
+ };
+
+ clint_mtimer8: timer@...c084000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac084000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu32_intc 7>,
+ <&cpu33_intc 7>,
+ <&cpu34_intc 7>,
+ <&cpu35_intc 7>;
+ };
+
+ clint_mtimer9: timer@...c094000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac094000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu36_intc 7>,
+ <&cpu37_intc 7>,
+ <&cpu38_intc 7>,
+ <&cpu39_intc 7>;
+ };
+
+ clint_mtimer10: timer@...c0a4000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac0a4000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu40_intc 7>,
+ <&cpu41_intc 7>,
+ <&cpu42_intc 7>,
+ <&cpu43_intc 7>;
+ };
+
+ clint_mtimer11: timer@...c0b4000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac0b4000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu44_intc 7>,
+ <&cpu45_intc 7>,
+ <&cpu46_intc 7>,
+ <&cpu47_intc 7>;
+ };
+
+ clint_mtimer12: timer@...c0c4000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac0c4000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu48_intc 7>,
+ <&cpu49_intc 7>,
+ <&cpu50_intc 7>,
+ <&cpu51_intc 7>;
+ };
+
+ clint_mtimer13: timer@...c0d4000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac0d4000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu52_intc 7>,
+ <&cpu53_intc 7>,
+ <&cpu54_intc 7>,
+ <&cpu55_intc 7>;
+ };
+
+ clint_mtimer14: timer@...c0e4000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac0e4000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu56_intc 7>,
+ <&cpu57_intc 7>,
+ <&cpu58_intc 7>,
+ <&cpu59_intc 7>;
+ };
+
+ clint_mtimer15: timer@...c0f4000 {
+ compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
+ reg = <0x00000070 0xac0f4000 0x00000000 0x0000c000>;
+ reg-names = "mtimecmp";
+ interrupts-extended = <&cpu60_intc 7>,
+ <&cpu61_intc 7>,
+ <&cpu62_intc 7>,
+ <&cpu63_intc 7>;
+ };
+ };
};
diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
index ec99da39150f..e6891f95d479 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
@@ -352,309 +352,6 @@ pcie_rc3: pcie@...2800000 {
status = "disabled";
};
- clint_mswi: interrupt-controller@...4000000 {
- compatible = "sophgo,sg2042-aclint-mswi", "thead,c900-aclint-mswi";
- reg = <0x00000070 0x94000000 0x00000000 0x00004000>;
- interrupts-extended = <&cpu0_intc 3>,
- <&cpu1_intc 3>,
- <&cpu2_intc 3>,
- <&cpu3_intc 3>,
- <&cpu4_intc 3>,
- <&cpu5_intc 3>,
- <&cpu6_intc 3>,
- <&cpu7_intc 3>,
- <&cpu8_intc 3>,
- <&cpu9_intc 3>,
- <&cpu10_intc 3>,
- <&cpu11_intc 3>,
- <&cpu12_intc 3>,
- <&cpu13_intc 3>,
- <&cpu14_intc 3>,
- <&cpu15_intc 3>,
- <&cpu16_intc 3>,
- <&cpu17_intc 3>,
- <&cpu18_intc 3>,
- <&cpu19_intc 3>,
- <&cpu20_intc 3>,
- <&cpu21_intc 3>,
- <&cpu22_intc 3>,
- <&cpu23_intc 3>,
- <&cpu24_intc 3>,
- <&cpu25_intc 3>,
- <&cpu26_intc 3>,
- <&cpu27_intc 3>,
- <&cpu28_intc 3>,
- <&cpu29_intc 3>,
- <&cpu30_intc 3>,
- <&cpu31_intc 3>,
- <&cpu32_intc 3>,
- <&cpu33_intc 3>,
- <&cpu34_intc 3>,
- <&cpu35_intc 3>,
- <&cpu36_intc 3>,
- <&cpu37_intc 3>,
- <&cpu38_intc 3>,
- <&cpu39_intc 3>,
- <&cpu40_intc 3>,
- <&cpu41_intc 3>,
- <&cpu42_intc 3>,
- <&cpu43_intc 3>,
- <&cpu44_intc 3>,
- <&cpu45_intc 3>,
- <&cpu46_intc 3>,
- <&cpu47_intc 3>,
- <&cpu48_intc 3>,
- <&cpu49_intc 3>,
- <&cpu50_intc 3>,
- <&cpu51_intc 3>,
- <&cpu52_intc 3>,
- <&cpu53_intc 3>,
- <&cpu54_intc 3>,
- <&cpu55_intc 3>,
- <&cpu56_intc 3>,
- <&cpu57_intc 3>,
- <&cpu58_intc 3>,
- <&cpu59_intc 3>,
- <&cpu60_intc 3>,
- <&cpu61_intc 3>,
- <&cpu62_intc 3>,
- <&cpu63_intc 3>;
- };
-
- clint_mtimer0: timer@...c004000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac004000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu0_intc 7>,
- <&cpu1_intc 7>,
- <&cpu2_intc 7>,
- <&cpu3_intc 7>;
- };
-
- clint_mtimer1: timer@...c014000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac014000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu4_intc 7>,
- <&cpu5_intc 7>,
- <&cpu6_intc 7>,
- <&cpu7_intc 7>;
- };
-
- clint_mtimer2: timer@...c024000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac024000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu8_intc 7>,
- <&cpu9_intc 7>,
- <&cpu10_intc 7>,
- <&cpu11_intc 7>;
- };
-
- clint_mtimer3: timer@...c034000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac034000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu12_intc 7>,
- <&cpu13_intc 7>,
- <&cpu14_intc 7>,
- <&cpu15_intc 7>;
- };
-
- clint_mtimer4: timer@...c044000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac044000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu16_intc 7>,
- <&cpu17_intc 7>,
- <&cpu18_intc 7>,
- <&cpu19_intc 7>;
- };
-
- clint_mtimer5: timer@...c054000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac054000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu20_intc 7>,
- <&cpu21_intc 7>,
- <&cpu22_intc 7>,
- <&cpu23_intc 7>;
- };
-
- clint_mtimer6: timer@...c064000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac064000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu24_intc 7>,
- <&cpu25_intc 7>,
- <&cpu26_intc 7>,
- <&cpu27_intc 7>;
- };
-
- clint_mtimer7: timer@...c074000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac074000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu28_intc 7>,
- <&cpu29_intc 7>,
- <&cpu30_intc 7>,
- <&cpu31_intc 7>;
- };
-
- clint_mtimer8: timer@...c084000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac084000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu32_intc 7>,
- <&cpu33_intc 7>,
- <&cpu34_intc 7>,
- <&cpu35_intc 7>;
- };
-
- clint_mtimer9: timer@...c094000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac094000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu36_intc 7>,
- <&cpu37_intc 7>,
- <&cpu38_intc 7>,
- <&cpu39_intc 7>;
- };
-
- clint_mtimer10: timer@...c0a4000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac0a4000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu40_intc 7>,
- <&cpu41_intc 7>,
- <&cpu42_intc 7>,
- <&cpu43_intc 7>;
- };
-
- clint_mtimer11: timer@...c0b4000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac0b4000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu44_intc 7>,
- <&cpu45_intc 7>,
- <&cpu46_intc 7>,
- <&cpu47_intc 7>;
- };
-
- clint_mtimer12: timer@...c0c4000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac0c4000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu48_intc 7>,
- <&cpu49_intc 7>,
- <&cpu50_intc 7>,
- <&cpu51_intc 7>;
- };
-
- clint_mtimer13: timer@...c0d4000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac0d4000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu52_intc 7>,
- <&cpu53_intc 7>,
- <&cpu54_intc 7>,
- <&cpu55_intc 7>;
- };
-
- clint_mtimer14: timer@...c0e4000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac0e4000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu56_intc 7>,
- <&cpu57_intc 7>,
- <&cpu58_intc 7>,
- <&cpu59_intc 7>;
- };
-
- clint_mtimer15: timer@...c0f4000 {
- compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
- reg = <0x00000070 0xac0f4000 0x00000000 0x0000c000>;
- reg-names = "mtimecmp";
- interrupts-extended = <&cpu60_intc 7>,
- <&cpu61_intc 7>,
- <&cpu62_intc 7>,
- <&cpu63_intc 7>;
- };
-
- intc: interrupt-controller@...0000000 {
- compatible = "sophgo,sg2042-plic", "thead,c900-plic";
- #address-cells = <0>;
- #interrupt-cells = <2>;
- reg = <0x00000070 0x90000000 0x00000000 0x04000000>;
- interrupt-controller;
- interrupts-extended =
- <&cpu0_intc 11>, <&cpu0_intc 9>,
- <&cpu1_intc 11>, <&cpu1_intc 9>,
- <&cpu2_intc 11>, <&cpu2_intc 9>,
- <&cpu3_intc 11>, <&cpu3_intc 9>,
- <&cpu4_intc 11>, <&cpu4_intc 9>,
- <&cpu5_intc 11>, <&cpu5_intc 9>,
- <&cpu6_intc 11>, <&cpu6_intc 9>,
- <&cpu7_intc 11>, <&cpu7_intc 9>,
- <&cpu8_intc 11>, <&cpu8_intc 9>,
- <&cpu9_intc 11>, <&cpu9_intc 9>,
- <&cpu10_intc 11>, <&cpu10_intc 9>,
- <&cpu11_intc 11>, <&cpu11_intc 9>,
- <&cpu12_intc 11>, <&cpu12_intc 9>,
- <&cpu13_intc 11>, <&cpu13_intc 9>,
- <&cpu14_intc 11>, <&cpu14_intc 9>,
- <&cpu15_intc 11>, <&cpu15_intc 9>,
- <&cpu16_intc 11>, <&cpu16_intc 9>,
- <&cpu17_intc 11>, <&cpu17_intc 9>,
- <&cpu18_intc 11>, <&cpu18_intc 9>,
- <&cpu19_intc 11>, <&cpu19_intc 9>,
- <&cpu20_intc 11>, <&cpu20_intc 9>,
- <&cpu21_intc 11>, <&cpu21_intc 9>,
- <&cpu22_intc 11>, <&cpu22_intc 9>,
- <&cpu23_intc 11>, <&cpu23_intc 9>,
- <&cpu24_intc 11>, <&cpu24_intc 9>,
- <&cpu25_intc 11>, <&cpu25_intc 9>,
- <&cpu26_intc 11>, <&cpu26_intc 9>,
- <&cpu27_intc 11>, <&cpu27_intc 9>,
- <&cpu28_intc 11>, <&cpu28_intc 9>,
- <&cpu29_intc 11>, <&cpu29_intc 9>,
- <&cpu30_intc 11>, <&cpu30_intc 9>,
- <&cpu31_intc 11>, <&cpu31_intc 9>,
- <&cpu32_intc 11>, <&cpu32_intc 9>,
- <&cpu33_intc 11>, <&cpu33_intc 9>,
- <&cpu34_intc 11>, <&cpu34_intc 9>,
- <&cpu35_intc 11>, <&cpu35_intc 9>,
- <&cpu36_intc 11>, <&cpu36_intc 9>,
- <&cpu37_intc 11>, <&cpu37_intc 9>,
- <&cpu38_intc 11>, <&cpu38_intc 9>,
- <&cpu39_intc 11>, <&cpu39_intc 9>,
- <&cpu40_intc 11>, <&cpu40_intc 9>,
- <&cpu41_intc 11>, <&cpu41_intc 9>,
- <&cpu42_intc 11>, <&cpu42_intc 9>,
- <&cpu43_intc 11>, <&cpu43_intc 9>,
- <&cpu44_intc 11>, <&cpu44_intc 9>,
- <&cpu45_intc 11>, <&cpu45_intc 9>,
- <&cpu46_intc 11>, <&cpu46_intc 9>,
- <&cpu47_intc 11>, <&cpu47_intc 9>,
- <&cpu48_intc 11>, <&cpu48_intc 9>,
- <&cpu49_intc 11>, <&cpu49_intc 9>,
- <&cpu50_intc 11>, <&cpu50_intc 9>,
- <&cpu51_intc 11>, <&cpu51_intc 9>,
- <&cpu52_intc 11>, <&cpu52_intc 9>,
- <&cpu53_intc 11>, <&cpu53_intc 9>,
- <&cpu54_intc 11>, <&cpu54_intc 9>,
- <&cpu55_intc 11>, <&cpu55_intc 9>,
- <&cpu56_intc 11>, <&cpu56_intc 9>,
- <&cpu57_intc 11>, <&cpu57_intc 9>,
- <&cpu58_intc 11>, <&cpu58_intc 9>,
- <&cpu59_intc 11>, <&cpu59_intc 9>,
- <&cpu60_intc 11>, <&cpu60_intc 9>,
- <&cpu61_intc 11>, <&cpu61_intc 9>,
- <&cpu62_intc 11>, <&cpu62_intc 9>,
- <&cpu63_intc 11>, <&cpu63_intc 9>;
- riscv,ndev = <224>;
- };
-
rstgen: reset-controller@...0013000 {
compatible = "sophgo,sg2042-reset";
reg = <0x00000070 0x30013000 0x00000000 0x0000000c>;
--
2.52.0
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