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Message-ID: <20260113023828.790136-2-inochiama@gmail.com>
Date: Tue, 13 Jan 2026 10:38:27 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Paul Walmsley <pjw@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Alexandre Ghiti <alex@...ti.fr>,
Chen Wang <unicorn_wang@...look.com>,
Inochi Amaoto <inochiama@...il.com>,
Han Gao <rabenda.cn@...il.com>,
Nutty Liu <liujingqi@...xincomputing.com>,
Thomas Gleixner <tglx@...utronix.de>,
Zixian Zeng <sycamoremoon376@...il.com>
Cc: devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org,
sophgo@...ts.linux.dev,
linux-kernel@...r.kernel.org,
Yixun Lan <dlan@...too.org>,
Longbin Li <looong.bin@...il.com>
Subject: [PATCH 2/2] riscv: dts: sophgo: fix the node order of SG2042 peripheral
In sg2042.dtsi, some peripheral device node does not follow the
address order. Reorder them in ascending order by address.
Signed-off-by: Inochi Amaoto <inochiama@...il.com>
---
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 176 ++++++++++++-------------
1 file changed, 88 insertions(+), 88 deletions(-)
diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
index e6891f95d479..9fddf3f0b3b9 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
@@ -264,94 +264,6 @@ clkgen: clock-controller@...0012000 {
#clock-cells = <1>;
};
- pcie_rc0: pcie@...0000000 {
- compatible = "sophgo,sg2042-pcie-host";
- device_type = "pci";
- reg = <0x70 0x60000000 0x0 0x00800000>,
- <0x40 0x00000000 0x0 0x00001000>;
- reg-names = "reg", "cfg";
- linux,pci-domain = <0>;
- #address-cells = <3>;
- #size-cells = <2>;
- ranges = <0x01000000 0x0 0x00000000 0x40 0xc0000000 0x0 0x00400000>,
- <0x42000000 0x0 0xd0000000 0x40 0xd0000000 0x0 0x10000000>,
- <0x02000000 0x0 0xe0000000 0x40 0xe0000000 0x0 0x20000000>,
- <0x43000000 0x42 0x00000000 0x42 0x00000000 0x2 0x00000000>,
- <0x03000000 0x41 0x00000000 0x41 0x00000000 0x1 0x00000000>;
- bus-range = <0x0 0xff>;
- vendor-id = <0x1f1c>;
- device-id = <0x2042>;
- cdns,no-bar-match-nbits = <48>;
- msi-parent = <&msi>;
- status = "disabled";
- };
-
- pcie_rc1: pcie@...0800000 {
- compatible = "sophgo,sg2042-pcie-host";
- device_type = "pci";
- reg = <0x70 0x60800000 0x0 0x00800000>,
- <0x44 0x00000000 0x0 0x00001000>;
- reg-names = "reg", "cfg";
- linux,pci-domain = <1>;
- #address-cells = <3>;
- #size-cells = <2>;
- ranges = <0x01000000 0x0 0x00000000 0x44 0xc0400000 0x0 0x00400000>,
- <0x42000000 0x0 0xd0000000 0x44 0xd0000000 0x0 0x10000000>,
- <0x02000000 0x0 0xe0000000 0x44 0xe0000000 0x0 0x20000000>,
- <0x43000000 0x46 0x00000000 0x46 0x00000000 0x2 0x00000000>,
- <0x03000000 0x45 0x00000000 0x45 0x00000000 0x1 0x00000000>;
- bus-range = <0x0 0xff>;
- vendor-id = <0x1f1c>;
- device-id = <0x2042>;
- cdns,no-bar-match-nbits = <48>;
- msi-parent = <&msi>;
- status = "disabled";
- };
-
- pcie_rc2: pcie@...2000000 {
- compatible = "sophgo,sg2042-pcie-host";
- device_type = "pci";
- reg = <0x70 0x62000000 0x0 0x00800000>,
- <0x48 0x00000000 0x0 0x00001000>;
- reg-names = "reg", "cfg";
- linux,pci-domain = <2>;
- #address-cells = <3>;
- #size-cells = <2>;
- ranges = <0x01000000 0x0 0x00000000 0x48 0xc0800000 0x0 0x00400000>,
- <0x42000000 0x0 0xd0000000 0x48 0xd0000000 0x0 0x10000000>,
- <0x02000000 0x0 0xe0000000 0x48 0xe0000000 0x0 0x20000000>,
- <0x03000000 0x49 0x00000000 0x49 0x00000000 0x1 0x00000000>,
- <0x43000000 0x4a 0x00000000 0x4a 0x00000000 0x2 0x00000000>;
- bus-range = <0x0 0xff>;
- vendor-id = <0x1f1c>;
- device-id = <0x2042>;
- cdns,no-bar-match-nbits = <48>;
- msi-parent = <&msi>;
- status = "disabled";
- };
-
- pcie_rc3: pcie@...2800000 {
- compatible = "sophgo,sg2042-pcie-host";
- device_type = "pci";
- reg = <0x70 0x62800000 0x0 0x00800000>,
- <0x4c 0x00000000 0x0 0x00001000>;
- reg-names = "reg", "cfg";
- linux,pci-domain = <3>;
- #address-cells = <3>;
- #size-cells = <2>;
- ranges = <0x01000000 0x0 0x00000000 0x4c 0xc0c00000 0x0 0x00400000>,
- <0x42000000 0x0 0xf8000000 0x4c 0xf8000000 0x0 0x04000000>,
- <0x02000000 0x0 0xfc000000 0x4c 0xfc000000 0x0 0x04000000>,
- <0x43000000 0x4e 0x00000000 0x4e 0x00000000 0x2 0x00000000>,
- <0x03000000 0x4d 0x00000000 0x4d 0x00000000 0x1 0x00000000>;
- bus-range = <0x0 0xff>;
- vendor-id = <0x1f1c>;
- device-id = <0x2042>;
- cdns,no-bar-match-nbits = <48>;
- msi-parent = <&msi>;
- status = "disabled";
- };
-
rstgen: reset-controller@...0013000 {
compatible = "sophgo,sg2042-reset";
reg = <0x00000070 0x30013000 0x00000000 0x0000000c>;
@@ -486,5 +398,93 @@ sd: mmc@...002b000 {
"timer";
status = "disabled";
};
+
+ pcie_rc0: pcie@...0000000 {
+ compatible = "sophgo,sg2042-pcie-host";
+ device_type = "pci";
+ reg = <0x70 0x60000000 0x0 0x00800000>,
+ <0x40 0x00000000 0x0 0x00001000>;
+ reg-names = "reg", "cfg";
+ linux,pci-domain = <0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges = <0x01000000 0x0 0x00000000 0x40 0xc0000000 0x0 0x00400000>,
+ <0x42000000 0x0 0xd0000000 0x40 0xd0000000 0x0 0x10000000>,
+ <0x02000000 0x0 0xe0000000 0x40 0xe0000000 0x0 0x20000000>,
+ <0x43000000 0x42 0x00000000 0x42 0x00000000 0x2 0x00000000>,
+ <0x03000000 0x41 0x00000000 0x41 0x00000000 0x1 0x00000000>;
+ bus-range = <0x0 0xff>;
+ vendor-id = <0x1f1c>;
+ device-id = <0x2042>;
+ cdns,no-bar-match-nbits = <48>;
+ msi-parent = <&msi>;
+ status = "disabled";
+ };
+
+ pcie_rc1: pcie@...0800000 {
+ compatible = "sophgo,sg2042-pcie-host";
+ device_type = "pci";
+ reg = <0x70 0x60800000 0x0 0x00800000>,
+ <0x44 0x00000000 0x0 0x00001000>;
+ reg-names = "reg", "cfg";
+ linux,pci-domain = <1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges = <0x01000000 0x0 0x00000000 0x44 0xc0400000 0x0 0x00400000>,
+ <0x42000000 0x0 0xd0000000 0x44 0xd0000000 0x0 0x10000000>,
+ <0x02000000 0x0 0xe0000000 0x44 0xe0000000 0x0 0x20000000>,
+ <0x43000000 0x46 0x00000000 0x46 0x00000000 0x2 0x00000000>,
+ <0x03000000 0x45 0x00000000 0x45 0x00000000 0x1 0x00000000>;
+ bus-range = <0x0 0xff>;
+ vendor-id = <0x1f1c>;
+ device-id = <0x2042>;
+ cdns,no-bar-match-nbits = <48>;
+ msi-parent = <&msi>;
+ status = "disabled";
+ };
+
+ pcie_rc2: pcie@...2000000 {
+ compatible = "sophgo,sg2042-pcie-host";
+ device_type = "pci";
+ reg = <0x70 0x62000000 0x0 0x00800000>,
+ <0x48 0x00000000 0x0 0x00001000>;
+ reg-names = "reg", "cfg";
+ linux,pci-domain = <2>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges = <0x01000000 0x0 0x00000000 0x48 0xc0800000 0x0 0x00400000>,
+ <0x42000000 0x0 0xd0000000 0x48 0xd0000000 0x0 0x10000000>,
+ <0x02000000 0x0 0xe0000000 0x48 0xe0000000 0x0 0x20000000>,
+ <0x03000000 0x49 0x00000000 0x49 0x00000000 0x1 0x00000000>,
+ <0x43000000 0x4a 0x00000000 0x4a 0x00000000 0x2 0x00000000>;
+ bus-range = <0x0 0xff>;
+ vendor-id = <0x1f1c>;
+ device-id = <0x2042>;
+ cdns,no-bar-match-nbits = <48>;
+ msi-parent = <&msi>;
+ status = "disabled";
+ };
+
+ pcie_rc3: pcie@...2800000 {
+ compatible = "sophgo,sg2042-pcie-host";
+ device_type = "pci";
+ reg = <0x70 0x62800000 0x0 0x00800000>,
+ <0x4c 0x00000000 0x0 0x00001000>;
+ reg-names = "reg", "cfg";
+ linux,pci-domain = <3>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges = <0x01000000 0x0 0x00000000 0x4c 0xc0c00000 0x0 0x00400000>,
+ <0x42000000 0x0 0xf8000000 0x4c 0xf8000000 0x0 0x04000000>,
+ <0x02000000 0x0 0xfc000000 0x4c 0xfc000000 0x0 0x04000000>,
+ <0x43000000 0x4e 0x00000000 0x4e 0x00000000 0x2 0x00000000>,
+ <0x03000000 0x4d 0x00000000 0x4d 0x00000000 0x1 0x00000000>;
+ bus-range = <0x0 0xff>;
+ vendor-id = <0x1f1c>;
+ device-id = <0x2042>;
+ cdns,no-bar-match-nbits = <48>;
+ msi-parent = <&msi>;
+ status = "disabled";
+ };
};
};
--
2.52.0
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