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Message-ID: <873449jumk.ffs@tglx>
Date: Tue, 13 Jan 2026 18:21:55 +0100
From: Thomas Gleixner <tglx@...nel.org>
To: Stafford Horne <shorne@...il.com>, LKML <linux-kernel@...r.kernel.org>
Cc: Linux OpenRISC <linux-openrisc@...r.kernel.org>, devicetree
<devicetree@...r.kernel.org>, Rob Herring <robh@...nel.org>, Krzysztof
Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Stafford Horne <shorne@...il.com>, Jonas Bonn <jonas@...thpole.se>, Stefan
Kristiansson <stefan.kristiansson@...nalahti.fi>
Subject: Re: [PATCH v4 4/6] openrisc: Fix IPIs on simple multicore systems
On Tue, Jan 13 2026 at 16:11, Stafford Horne wrote:
> Commit c05671846451 ("openrisc: sleep instead of spin on secondary
> wait") fixed OpenRISC SMP Linux for QEMU. However, stability was never
> achieved on FPGA development boards. This is because the above patch
> has a step to unmask IPIs on non-boot cpu's but on hardware without
> power management, IPIs remain masked.
>
> This meant that IPI's were never actually working on the simple SMP
> systems we run on development boards. The systems booted but stability
> was very suspect.
>
> Add the ability to unmask IPI's on the non-boot cores. This is done by
> making the OMPIC IRQs proper percpu IRQs. We can then use the
> enabled_percpu_irq() to unmask IRQ on the non-boot cpus.
>
> Update the or1k PIC driver to use a flow handler that can switch between
> percpu and the configured level or edge flow handlers at runtime.
> This mechanism is inspired by that done in the J-Core AIC driver.
>
> Signed-off-by: Stafford Horne <shorne@...il.com>
Acked-by: Thomas Gleixner <tglx@...nel.org>
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