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Message-ID: <5a053bb6-5052-4664-b0cb-f05d56d4679d@sirena.org.uk>
Date: Wed, 14 Jan 2026 17:27:53 +0000
From: Mark Brown <broonie@...nel.org>
To: Fuad Tabba <tabba@...gle.com>
Cc: Marc Zyngier <maz@...nel.org>, Joey Gouly <joey.gouly@....com>,
Catalin Marinas <catalin.marinas@....com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Will Deacon <will@...nel.org>, Paolo Bonzini <pbonzini@...hat.com>,
Jonathan Corbet <corbet@....net>, Shuah Khan <shuah@...nel.org>,
Oliver Upton <oupton@...nel.org>, Dave Martin <Dave.Martin@....com>,
Mark Rutland <mark.rutland@....com>,
Ben Horgan <ben.horgan@....com>,
linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.linux.dev,
linux-kernel@...r.kernel.org, kvm@...r.kernel.org,
linux-doc@...r.kernel.org, linux-kselftest@...r.kernel.org,
Peter Maydell <peter.maydell@...aro.org>,
Eric Auger <eric.auger@...hat.com>
Subject: Re: [PATCH v9 23/30] KVM: arm64: Context switch SME state for guests
On Tue, Jan 13, 2026 at 02:24:56PM +0000, Fuad Tabba wrote:
> On Tue, 23 Dec 2025 at 01:23, Mark Brown <broonie@...nel.org> wrote:
> > +#define sme_cond_update_smcr_vq(val, reg) \
> > + do { \
> > + u64 __smcr = read_sysreg_s((reg)); \
> > + u64 __new = __smcr & ~SMCR_ELx_LEN_MASK; \
> > + __new |= (val) & SMCR_ELx_LEN_MASK; \
> Similar to what I pointed out in patch 15 [1], I think you need to
> preserve the other bits, since SMCR isn't just about the length.
This does preserve the existing bits? It reads SMCR, masks out and then
replaces the length.
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