linux-kernel - Re: [PATCH v9 25/30] KVM: arm64: Expose SME to nested guests

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <2498896a-78cb-4184-82ac-6497b1e9bd03@sirena.org.uk>
Date: Wed, 14 Jan 2026 18:22:05 +0000
From: Mark Brown <broonie@...nel.org>
To: Fuad Tabba <tabba@...gle.com>
Cc: Marc Zyngier <maz@...nel.org>, Joey Gouly <joey.gouly@....com>,
	Catalin Marinas <catalin.marinas@....com>,
	Suzuki K Poulose <suzuki.poulose@....com>,
	Will Deacon <will@...nel.org>, Paolo Bonzini <pbonzini@...hat.com>,
	Jonathan Corbet <corbet@....net>, Shuah Khan <shuah@...nel.org>,
	Oliver Upton <oupton@...nel.org>, Dave Martin <Dave.Martin@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ben Horgan <ben.horgan@....com>,
	linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.linux.dev,
	linux-kernel@...r.kernel.org, kvm@...r.kernel.org,
	linux-doc@...r.kernel.org, linux-kselftest@...r.kernel.org,
	Peter Maydell <peter.maydell@...aro.org>,
	Eric Auger <eric.auger@...hat.com>
Subject: Re: [PATCH v9 25/30] KVM: arm64: Expose SME to nested guests

On Tue, Jan 13, 2026 at 02:37:57PM +0000, Fuad Tabba wrote:
> On Tue, 23 Dec 2025 at 01:23, Mark Brown <broonie@...nel.org> wrote:

> >         case SYS_ID_AA64PFR1_EL1:
> > -               /* Only support BTI, SSBS, CSV2_frac */
> > +               /* Only support BTI, SME, SSBS, CSV2_frac */
> >                 val &= ~(ID_AA64PFR1_EL1_PFAR           |
> >                          ID_AA64PFR1_EL1_MTEX           |
> >                          ID_AA64PFR1_EL1_THE            |
> >                          ID_AA64PFR1_EL1_GCS            |
> >                          ID_AA64PFR1_EL1_MTE_frac       |
> >                          ID_AA64PFR1_EL1_NMI            |
> > -                        ID_AA64PFR1_EL1_SME            |

> Should we also limit this to SME2, i.e.

> + val = ID_REG_LIMIT_FIELD_ENUM(val, ID_AA64PFR1_EL1, SME, SME2);

> That said, we don't do anything similar to SVE, but it might also be
> worth doing that there.

This feels like a general approach issue with these registers that's out
of scope for this series, it's not just the vector extensions which
could introduce new state or anything else that requires explicit
support.  AIUI the theory here is that we bootstrap from the host's
sanitised registers so the time to add any required limits on future
values would be when enabling them for the host kernel, assuming KVM
support isn't added simultaneously.

Download attachment "signature.asc" of type "application/pgp-signature" (489 bytes)