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Message-ID: <CAMuHMdUJBKnqU_HtF1KpZY-75iTWjZwedLbFSYLpgDfVHGsW1g@mail.gmail.com>
Date: Wed, 14 Jan 2026 10:32:06 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Marek Vasut <marek.vasut+renesas@...lbox.org>
Cc: dri-devel@...ts.freedesktop.org, Andrzej Hajda <andrzej.hajda@...el.com>,
Conor Dooley <conor+dt@...nel.org>, David Airlie <airlied@...il.com>,
Jernej Skrabec <jernej.skrabec@...il.com>, Jonas Karlman <jonas@...boo.se>,
Joseph Guo <qijian.guo@....com>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>,
Neil Armstrong <neil.armstrong@...aro.org>, Rob Herring <robh@...nel.org>,
Robert Foss <rfoss@...nel.org>, Simona Vetter <simona@...ll.ch>,
Thomas Zimmermann <tzimmermann@...e.de>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org
Subject: Re: [PATCH 2/2] drm/bridge: waveshare-dsi: Add support for 1..4 DSI
data lanes
Hi Marek,
On Tue, 13 Jan 2026 at 00:48, Marek Vasut
<marek.vasut+renesas@...lbox.org> wrote:
> Parse the data lane count out of DT. Limit the supported data lanes
> to 1..4 which is the maximum available DSI pairs on the connector of
> any known panels which may use this bridge. Internally, this bridge
> is an ChipOne ICN6211 which loads its register configuration from a
> dedicated storage and its I2C does not seem to be accessible. The
> ICN6211 also supports up to 4 DSI lanes, so this is a hard limit.
>
> To avoid any breakage on old DTs where the parsing of data lanes from
> DT may fail, fall back to the original hard-coded value of 2 lanes and
> warn user.
>
> The lane configuration is preconfigured in the bridge for each of the
> WaveShare panels. The 13.3" DSI panel works with 4-lane configuration,
> others seem to use 2-lane configuration. This is a hardware property,
> so the actual count should come from DT.
>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@...lbox.org>
Thanks for your patch!
> --- a/drivers/gpu/drm/bridge/waveshare-dsi.c
> +++ b/drivers/gpu/drm/bridge/waveshare-dsi.c
> @@ -66,7 +66,11 @@ static int ws_bridge_attach_dsi(struct ws_bridge *ws)
> dsi->mode_flags = MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO |
> MIPI_DSI_CLOCK_NON_CONTINUOUS;
> dsi->format = MIPI_DSI_FMT_RGB888;
> - dsi->lanes = 2;
> + dsi->lanes = drm_of_get_data_lanes_count_ep(dev->of_node, 0, 0, 1, 4);
> + if (dsi->lanes < 0) {
> + dev_warn(dev, "Invalid DSI lane count %d, falling back to 2 lanes\n", dsi->lanes);
"Invalid or missing"?
BTW, I doubt the kerneldoc for drm_of_get_data_lanes_count_ep()
is correct:
* Return:
* * min..max - positive integer count of "data-lanes" elements
* * -EINVAL - the "data-mapping" property is unsupported
* * -ENODEV - the "data-mapping" property is missing
1. s/data-mapping/data-lanes/,
2. of_property_count_u32_elems() never returns -ENODEV?
> + dsi->lanes = 2; /* Old DT backward compatibility */
> + }
>
> ret = devm_mipi_dsi_attach(dev, dsi);
> if (ret < 0)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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