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Message-ID: <ce9e2b46-58c9-4346-9e87-d5fbedd13826@baylibre.com>
Date: Fri, 16 Jan 2026 16:43:13 -0600
From: David Lechner <dlechner@...libre.com>
To: Jonathan Cameron <jic23@...nel.org>
Cc: Mark Brown <broonie@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Marcelo Schmitt <marcelo.schmitt@...log.com>,
Michael Hennerich <michael.hennerich@...log.com>,
Nuno Sá <nuno.sa@...log.com>,
Andy Shevchenko <andy@...nel.org>, Sean Anderson <sean.anderson@...ux.dev>,
linux-spi@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-iio@...r.kernel.org
Subject: Re: [PATCH v5 7/9] spi: axi-spi-engine: support
SPI_MULTI_LANE_MODE_STRIPE
On 1/14/26 3:16 AM, Jonathan Cameron wrote:
> On Mon, 12 Jan 2026 11:45:25 -0600
> David Lechner <dlechner@...libre.com> wrote:
>
>> Add support for SPI_MULTI_LANE_MODE_STRIPE to the AXI SPI engine driver.
>>
>> The v2.0.0 version of the AXI SPI Engine IP core supports multiple
>> lanes. This can be used with SPI_MULTI_LANE_MODE_STRIPE to support
>> reading from simultaneous sampling ADCs that have a separate SDO line
>> for each analog channel. This allows reading all channels at the same
>> time to increase throughput.
>>
>> Reviewed-by: Marcelo Schmitt <marcelo.schmitt@...log.com>
>> Signed-off-by: David Lechner <dlechner@...libre.com>
> Hi David,
>
> I kind of hope ADI make their versions backwards compatible (or at
> least try to) so the version check might be a bit over the top.
FWIW, I was the one that actually pushed for the FPGA IP block major
version change. There wasn't a default value for the new bit fields
that worked in every case, so there wasn't a way to make it fully
backwards compatible with older drivers that don't set those bits.
>
> Anyhow, not my problem and the code is nice and clean.
>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@...wei.com>
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