linux-kernel - Re: [PATCH 2/3] cpufreq: ti-cpufreq: add support for AM62L3 SoC

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Message-ID: <79d0f072-80f9-4757-b25d-84260551e217@kernel.org>
Date: Fri, 16 Jan 2026 10:16:55 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Dhruva Gole <d-gole@...com>, "Rafael J. Wysocki" <rafael@...nel.org>,
 Viresh Kumar <viresh.kumar@...aro.org>, Nishanth Menon <nm@...com>,
 Vignesh Raghavendra <vigneshr@...com>, Tero Kristo <kristo@...nel.org>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>
Cc: Kendall Willis <k-willis@...com>, Sebin Francis <sebin.francis@...com>,
 Bryan Brattlof <bb@...com>, linux-pm@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 devicetree@...r.kernel.org
Subject: Re: [PATCH 2/3] cpufreq: ti-cpufreq: add support for AM62L3 SoC

On 16/01/2026 10:01, Dhruva Gole wrote:
> Add CPUFreq support for the AM62L3 SoC with the appropriate
> AM62L3 speed grade constants according to the datasheet [1].
> 
> This follows the same architecture-specific implementation pattern
> as other TI SoCs in the AM6x family.
> 
> [1] https://www.ti.com/lit/pdf/SPRSPA1
> 
> Signed-off-by: Dhruva Gole <d-gole@...com>
> ---
>  drivers/cpufreq/ti-cpufreq.c | 32 ++++++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
> index 6ee76f5fe9c567b0b88797ddb51764a2a5606b16..8d8fdb068dcdc2caa0b656405f38a072c0700f71 100644
> --- a/drivers/cpufreq/ti-cpufreq.c
> +++ b/drivers/cpufreq/ti-cpufreq.c
> @@ -48,6 +48,12 @@
>  #define AM625_SUPPORT_S_MPU_OPP			BIT(1)
>  #define AM625_SUPPORT_T_MPU_OPP			BIT(2)
>  
> +#define AM62L3_EFUSE_E_MPU_OPP			5
> +#define AM62L3_EFUSE_O_MPU_OPP			15
> +
> +#define AM62L3_SUPPORT_E_MPU_OPP		BIT(0)
> +#define AM62L3_SUPPORT_O_MPU_OPP		BIT(1)
> +
>  enum {
>  	AM62A7_EFUSE_M_MPU_OPP =		13,
>  	AM62A7_EFUSE_N_MPU_OPP,
> @@ -213,6 +219,22 @@ static unsigned long am625_efuse_xlate(struct ti_cpufreq_data *opp_data,
>  	return calculated_efuse;
>  }
>  
> +static unsigned long am62l3_efuse_xlate(struct ti_cpufreq_data *opp_data,
> +				       unsigned long efuse)
> +{
> +	unsigned long calculated_efuse = AM62L3_SUPPORT_E_MPU_OPP;
> +
> +	switch (efuse) {
> +	case AM62L3_EFUSE_O_MPU_OPP:
> +		calculated_efuse |= AM62L3_SUPPORT_O_MPU_OPP;
> +		fallthrough;
> +	case AM62L3_EFUSE_E_MPU_OPP:
> +		calculated_efuse |= AM62L3_SUPPORT_E_MPU_OPP;
> +	}
> +
> +	return calculated_efuse;
> +}
> +
>  static struct ti_cpufreq_soc_data am3x_soc_data = {
>  	.efuse_xlate = amx3_efuse_xlate,
>  	.efuse_fallback = AM33XX_800M_ARM_MPU_MAX_FREQ,
> @@ -315,6 +337,7 @@ static const struct soc_device_attribute k3_cpufreq_soc[] = {
>  	{ .family = "AM62AX", },
>  	{ .family = "AM62PX", },
>  	{ .family = "AM62DX", },
> +	{ .family = "AM62LX", },

So you just stuff at the end in every commit leading to unnecessary risk
of conflicts.

>  	{ /* sentinel */ }
>  };
>  
> @@ -327,6 +350,14 @@ static struct ti_cpufreq_soc_data am625_soc_data = {
>  	.quirks = TI_QUIRK_SYSCON_IS_SINGLE_REG,
>  };
>  
> +static struct ti_cpufreq_soc_data am62l3_soc_data = {
> +	.efuse_xlate = am62l3_efuse_xlate,
> +	.efuse_offset = 0x0,
> +	.efuse_mask = 0x07c0,
> +	.efuse_shift = 0x6,
> +	.multi_regulator = false,
> +};
> +
>  static struct ti_cpufreq_soc_data am62a7_soc_data = {
>  	.efuse_xlate = am62a7_efuse_xlate,
>  	.efuse_offset = 0x0,
> @@ -463,6 +494,7 @@ static const struct of_device_id ti_cpufreq_of_match[]  __maybe_unused = {
>  	{ .compatible = "ti,am625", .data = &am625_soc_data, },
>  	{ .compatible = "ti,am62a7", .data = &am62a7_soc_data, },
>  	{ .compatible = "ti,am62d2", .data = &am62a7_soc_data, },
> +	{ .compatible = "ti,am62l3", .data = &am62l3_soc_data, },

Oh no, here it is correct. Random choices?

>  	{ .compatible = "ti,am62p5", .data = &am62p5_soc_data, },
>  	/* legacy */
>  	{ .compatible = "ti,omap3430", .data = &omap34xx_soc_data, },
> 


Best regards,
Krzysztof