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Message-ID: <010df7e2-ea01-4b32-ae4f-40bff3ad278b@ixit.cz>
Date: Sun, 18 Jan 2026 10:51:06 +0100
From: David Heidelberg <david@...t.cz>
To: Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
Robert Foss <rfoss@...nel.org>, Todor Tomov <todor.too@...il.com>,
Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Luca Weiss <luca.weiss@...rphone.com>, Petr Hodina <phodina@...tonmail.com>,
Casey Connolly <casey.connolly@...aro.org>, "Dr. Git" <drgitx@...il.com>
Cc: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Joel Selvaraj <foss@...lselvaraj.com>, Kieran Bingham <kbingham@...nel.org>,
Sakari Ailus <sakari.ailus@...ux.intel.com>, linux-media@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
phone-devel@...r.kernel.org
Subject: Re: [PATCH v3 5/8] media: qcom: camss: csiphy-3ph: Add Gen2 v1.1 MIPI
CSI-2 CPHY init
On 17/01/2026 22:49, Bryan O'Donoghue wrote:
> On 17/01/2026 15:36, David Heidelberg via B4 Relay wrote:
>> From: Casey Connolly <casey.connolly@...aro.org>
>>
>> Add a PHY configuration sequence for the sdm845 which uses a Qualcomm
>> Gen 2 version 1.1 CSI-2 PHY.
>>
>> The PHY can be configured as two phase or three phase in C-PHY or D-PHY
>> mode. This configuration supports three-phase C-PHY mode.
>>
>> Signed-off-by: Casey Connolly <casey.connolly@...aro.org>
>> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>
>> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
>> Co-developed-by: David Heidelberg <david@...t.cz>
>> Signed-off-by: David Heidelberg <david@...t.cz>
>> ---
>> .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 70 ++++++++++++
>> +++++++++-
>> 1 file changed, 69 insertions(+), 1 deletion(-)
>>
[...]
>> @@ -1050,7 +1114,11 @@ static int csiphy_lanes_enable(struct
>> csiphy_device *csiphy,
>> switch (csiphy->camss->res->version) {
>> case CAMSS_845:
>> - { /* V4L2_MBUS_CSI2_DPHY */
>> + if (c->phy_cfg == V4L2_MBUS_CSI2_CPHY) {
>> + regs->lane_regs = &lane_regs_sdm845_3ph[0];
>> + regs->lane_array_size = ARRAY_SIZE(lane_regs_sdm845_3ph);
>> +
>> + } else { /* V4L2_MBUS_CSI2_DPHY */
>
> This is inconsistent commenting Ted and I'd reckon something
> checkpatch.pl spits back at you.
>
> If checkpatch.pl doesn't complain about it, I think it probably should.
>
> Please standardise the location of the comment and have one for the CPHY
> and one for the DPHY configs.
Then I can rather replace the else with elseif (== DPHY) and make the
comment irrelevant. What is your recommendation?
David>
>> regs->lane_regs = &lane_regs_sdm845[0];
>> regs->lane_array_size = ARRAY_SIZE(lane_regs_sdm845);
>> }
>>
>
> Once implemented.
>
> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
>
> ---
> bod
--
David Heidelberg
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