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Message-ID: <aW8vhU-ECUIITPoh@smile.fi.intel.com>
Date: Tue, 20 Jan 2026 09:32:21 +0200
From: Andy Shevchenko <andriy.shevchenko@...el.com>
To: Feng Jiang <jiangfeng@...inos.cn>
Cc: pjw@...nel.org, palmer@...belt.com, aou@...s.berkeley.edu,
alex@...ti.fr, akpm@...ux-foundation.org, kees@...nel.org,
andy@...nel.org, ebiggers@...nel.org, martin.petersen@...cle.com,
ardb@...nel.org, charlie@...osinc.com, conor.dooley@...rochip.com,
ajones@...tanamicro.com, linus.walleij@...aro.org,
nathan@...nel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-hardening@...r.kernel.org,
Joel Stanley <joel@....id.au>
Subject: Re: [PATCH v3 8/8] riscv: lib: add strrchr implementation
On Tue, Jan 20, 2026 at 02:58:52PM +0800, Feng Jiang wrote:
> Add an assembly implementation of strrchr() for RISC-V.
>
> This implementation minimizes instruction count and avoids unnecessary
> memory access to the stack. The performance benefits are most visible
> on small workloads (1-16 bytes) where the architectural savings in
> function overhead outweigh the execution time of the scan loop.
>
> Benchmark results (QEMU TCG, rv64):
> Length | Original (MB/s) | Optimized (MB/s) | Improvement
> -------|-----------------|------------------|------------
> 1 B | 21 | 22 | +4.7%
> 7 B | 116 | 122 | +5.1%
> 16 B | 195 | 208 | +6.6%
> 512 B | 388 | 399 | +2.8%
> 4096 B | 411 | 411 | +0.0%
> Suggested-by: Andy Shevchenko <andy@...nel.org>
Wrong tag.
--
With Best Regards,
Andy Shevchenko
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