linux-kernel - Re: [PATCH v2 00/13] spi: cadence-qspi: Add Renesas RZ/N1 support

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Message-ID: <80e7a578-4636-48bd-b92b-54fa33cc076d@ti.com>
Date: Tue, 20 Jan 2026 14:52:38 +0530
From: Santhosh Kumar K <s-k6@...com>
To: "Miquel Raynal (Schneider Electric)" <miquel.raynal@...tlin.com>, "Mark
 Brown" <broonie@...nel.org>, Rob Herring <robh@...nel.org>, "Krzysztof
 Kozlowski" <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, "Geert
 Uytterhoeven" <geert+renesas@...der.be>, Magnus Damm <magnus.damm@...il.com>,
	Vaishnav Achath <vaishnav.a@...com>
CC: Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
	Hervé Codina <herve.codina@...tlin.com>, Wolfram Sang
	<wsa+renesas@...g-engineering.com>, Vignesh Raghavendra <vigneshr@...com>,
	Pratyush Yadav <pratyush@...nel.org>, Pascal Eberhard
	<pascal.eberhard@...com>, <linux-spi@...r.kernel.org>,
	<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-renesas-soc@...r.kernel.org>, <s-k6@...com>
Subject: Re: [PATCH v2 00/13] spi: cadence-qspi: Add Renesas RZ/N1 support

Hello Miquel,

On 15/01/26 14:54, Miquel Raynal (Schneider Electric) wrote:
> Hello,
> 
> This series adds support for the QSPI controller available on Renesas
> RZ/N1S and RZ/N1D SoC. It has been tested with a custom board (see last
> SPI patch for details).
> 
> Adding support for this SoC required a few adaptations in the Cadence
> QSPI driver. The bulk of the work is in the few last patches. Everything
> else is just misc style fixes and improvements which bothered me while I
> was wandering.
> 
> In order to support all constraints, I sometimes used a new quirk (for
> the write protection feature and the "no indirect mode"), and sometimes
> used the compatible directly. The ones I thought might not be RZ/N1
> specific have been implemented under the form of a quirk, in order to
> ease their reuse. The other adaptations, which I believe are more
> Renesas specific, have been handled using the compatible. This is all
> very arbitrary, and can be discussed.
> 
> Thanks,
> Miquèl
> 
> Signed-off-by: Miquel Raynal (Schneider Electric) <miquel.raynal@...tlin.com>

Thank you for the series! Tested it on TI's AM62A SK with
OSPI NAND (Winbond's W35N01JW).

Controller fails to probe with the following message:

[    1.868863] cadence-qspi fc40000.spi: Cannot claim mandatory QSPI ref 
clock.

Regards,
Santhosh.

> ---
> Changes in v2:
> - Fix commit log of DT binding patch, following Krzysztof's comment.
> - Fix properties order in DTSI.
> - Rebase on top of spi/for-next and fix all conflicts.
> - Simplify even further the code in the cleanup patches following
>    Pratyush's advices.
> - Link to v1: https://lore.kernel.org/r/20251219-schneider-6-19-rc1-qspi-v1-0-8ad505173e44@bootlin.com
> 
> ---
> Miquel Raynal (1):
>        spi: cadence-qspi: Make sure we filter out unsupported ops
> 
> Miquel Raynal (Schneider Electric) (12):
>        spi: dt-bindings: cdns,qspi-nor: Add Renesas RZ/N1D400 to the list
>        spi: cadence-qspi: Align definitions
>        spi: cadence-qspi: Fix style and improve readability
>        spi: cadence-qspi: Fix ORing style and alignments
>        spi: cadence-qspi: Remove an useless operation
>        spi: cadence-qspi: Fix probe error path and remove
>        spi: cadence-qspi: Try hard to disable the clocks
>        spi: cadence-qspi: Kill cqspi_jh7110_clk_init
>        spi: cadence-qspi: Add a flag for controllers without indirect access support
>        spi: cadence-qspi: Make sure write protection is disabled
>        spi: cadence-qspi: Add support for the Renesas RZ/N1 controller
>        ARM: dts: r9a06g032: Describe the QSPI controller
> 
>   .../devicetree/bindings/spi/cdns,qspi-nor.yaml     |   4 +
>   arch/arm/boot/dts/renesas/r9a06g032.dtsi           |  14 ++
>   drivers/spi/spi-cadence-quadspi.c                  | 260 ++++++++++-----------
>   3 files changed, 144 insertions(+), 134 deletions(-)
> ---
> base-commit: 0afb3ab76ffb521700af678ea931d31192f93260
> change-id: 20251219-schneider-6-19-rc1-qspi-7c3e1547af6d
> 
> Best regards,