linux-kernel - Re: [PATCH v2 00/13] spi: cadence-qspi: Add Renesas RZ/N1 support

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Message-ID: <87cy34s4sg.fsf@bootlin.com>
Date: Tue, 20 Jan 2026 16:05:35 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Santhosh Kumar K <s-k6@...com>
Cc: "Mark Brown" <broonie@...nel.org>,  Rob Herring <robh@...nel.org>,
  "Krzysztof Kozlowski" <krzk+dt@...nel.org>,  Conor Dooley
 <conor+dt@...nel.org>,  "Geert Uytterhoeven" <geert+renesas@...der.be>,
  Magnus Damm <magnus.damm@...il.com>,  Vaishnav Achath
 <vaishnav.a@...com>,  Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
  Hervé Codina <herve.codina@...tlin.com>,  Wolfram Sang
 <wsa+renesas@...g-engineering.com>,  Vignesh Raghavendra
 <vigneshr@...com>,  Pratyush Yadav <pratyush@...nel.org>,  Pascal Eberhard
 <pascal.eberhard@...com>,  <linux-spi@...r.kernel.org>,
  <devicetree@...r.kernel.org>,  <linux-kernel@...r.kernel.org>,
  <linux-renesas-soc@...r.kernel.org>
Subject: Re: [PATCH v2 00/13] spi: cadence-qspi: Add Renesas RZ/N1 support

Hi Santhosh,

On 20/01/2026 at 14:52:38 +0530, Santhosh Kumar K <s-k6@...com> wrote:

> Hello Miquel,
>
> On 15/01/26 14:54, Miquel Raynal (Schneider Electric) wrote:
>> Hello,
>> This series adds support for the QSPI controller available on Renesas
>> RZ/N1S and RZ/N1D SoC. It has been tested with a custom board (see last
>> SPI patch for details).
>> Adding support for this SoC required a few adaptations in the Cadence
>> QSPI driver. The bulk of the work is in the few last patches. Everything
>> else is just misc style fixes and improvements which bothered me while I
>> was wandering.
>> In order to support all constraints, I sometimes used a new quirk (for
>> the write protection feature and the "no indirect mode"), and sometimes
>> used the compatible directly. The ones I thought might not be RZ/N1
>> specific have been implemented under the form of a quirk, in order to
>> ease their reuse. The other adaptations, which I believe are more
>> Renesas specific, have been handled using the compatible. This is all
>> very arbitrary, and can be discussed.
>> Thanks,
>> Miquèl
>> Signed-off-by: Miquel Raynal (Schneider Electric)
>> <miquel.raynal@...tlin.com>
>
> Thank you for the series! Tested it on TI's AM62A SK with
> OSPI NAND (Winbond's W35N01JW).
>
> Controller fails to probe with the following message:
>
> [    1.868863] cadence-qspi fc40000.spi: Cannot claim mandatory QSPI ref
> clock.

Strange, I was nonetheless careful not to change the existing
behaviour on other SoCs. I have that board, I will give it a try.

Thanks a lot for the feedback.
Miquèl