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Message-ID:
<TY3PR01MB11346A3CF9B713432E7345D468696A@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Date: Wed, 21 Jan 2026 12:25:59 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: biju.das.au <biju.das.au@...il.com>, Geert Uytterhoeven
<geert+renesas@...der.be>, magnus.damm <magnus.damm@...il.com>, Rob Herring
<robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>
CC: "linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, Prabhakar
Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>, biju.das.au
<biju.das.au@...il.com>
Subject: RE: [PATCH 10/12] arm64: dts: renesas: Add initial support for RZ/G3L
SMARC SoM
Hi All,
> -----Original Message-----
> From: Biju <biju.das.au@...il.com>
> Sent: 20 January 2026 12:52
> Subject: [PATCH 10/12] arm64: dts: renesas: Add initial support for RZ/G3L SMARC SoM
>
> From: Biju Das <biju.das.jz@...renesas.com>
>
> Add initial support for the RZ/G3L SMARC SoM with 2GB memory and extal clk.
>
> Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> ---
> .../boot/dts/renesas/rzg3l-smarc-som.dtsi | 22 +++++++++++++++++++
> 1 file changed, 22 insertions(+)
> create mode 100644 arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
>
> diff --git a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3l-
> smarc-som.dtsi
> new file mode 100644
> index 000000000000..7a3a2d4ab037
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
> @@ -0,0 +1,22 @@
> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +/*
> + * Device Tree Source for R9A08G046L48 SMARC SoM board.
> + *
> + * Copyright (C) 2026 Renesas Electronics Corp.
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
Will drop this header file in v2.
Cheers,
Biju
> +
> +/ {
> + compatible = "renesas,rzg3l-smarcm", "renesas,r9a08g046l48",
> +"renesas,r9a08g046";
> +
> + memory@...00000 {
> + device_type = "memory";
> + /* First 128MB is reserved for secure area. */
> + reg = <0x0 0x48000000 0x0 0x78000000>;
> + };
> +};
> +
> +&extal_clk {
> + clock-frequency = <24000000>;
> +};
> --
> 2.43.0
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