linux-kernel - Re: [PATCH 1/2] dt-bindings: i2c: add atciic100

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Message-ID: <d85048ff-ed13-4fe0-ab5c-b1ba810964a5@kernel.org>
Date: Thu, 22 Jan 2026 12:27:00 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Ben Zong-You Xie <ben717@...estech.com>
Cc: linux-i2c@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, andi.shyti@...nel.org, robh@...nel.org,
 krzk+dt@...nel.org, conor+dt@...nel.org
Subject: Re: [PATCH 1/2] dt-bindings: i2c: add atciic100

On 22/01/2026 12:18, Ben Zong-You Xie wrote:
> On Sun, Feb 09, 2025 at 01:29:58PM +0100, Krzysztof Kozlowski wrote:
>> On Fri, Feb 07, 2025 at 10:19:22AM +0800, Ben Zong-You Xie wrote:
>>> Document devicetree bindings for Andes I2C controller.
>>
>> Explain what is the hardware... Here is Andes I2C
>>
>>>
>>> Signed-off-by: Ben Zong-You Xie <ben717@...estech.com>
>>> ---
>>>  .../bindings/i2c/andestech,i2c-atciic100.yaml | 40 +++++++++++++++++++
>>>  MAINTAINERS                                   |  5 +++
>>>  2 files changed, 45 insertions(+)
>>>  create mode 100644 Documentation/devicetree/bindings/i2c/andestech,i2c-atciic100.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/i2c/andestech,i2c-atciic100.yaml b/Documentation/devicetree/bindings/i2c/andestech,i2c-atciic100.yaml
>>> new file mode 100644
>>> index 000000000000..cf96a9186176
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/i2c/andestech,i2c-atciic100.yaml
>>> @@ -0,0 +1,40 @@
>>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/pwm/andestech,atciic100.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Andes I2C Controller
>>
>> Here as well
>>
>>> +
>>> +maintainers:
>>> +  - Ben Zong-You Xie <ben717@...estech.com>
>>> +
>>> +allOf:
>>> +  - $ref: /schemas/i2c/i2c-controller.yaml#
>>> +
>>> +properties:
>>> +  compatible:
>>> +    const: andestech,atciic100
>>
>> But here atciic100. This is all confusing. What is the SoC? What is the
>> name of this device?
> 
> Hi Krzysztof,
> 
> Sorry for the confusion. atciic100 is the name for the I2C IP block, and it
> is integrated on QiLai SoC. That's why I added a new compatible
> "andestech,qilai-i2c" in v2.

So atciic100 is not an SoC... but then why there is I2C and SPI variant?
Is this some serial engine? Because if it is, you probably miss here
much more bindings for complete hardware description.

Plus, if this is IP block, how can it be used alone? We forbid that sort
of compatibles long time ago.

Anyway you have entire commit msg to explain that.

> 
> For AE350 platform, I know it has not been upstreamed yet, but it was
> discussed and acknowledged in a separate SPI series [1], which is why I

I see ae350-spi there, not atciic100.

> included it as a fallback. Can I keep this? If not, I will drop it
> and update the compatibles in v3 as follows:

Nothing was explained in the commit msg, so with all this being
confusing that's the review you got. You literally wrote one half baked
sentence being copy of subject, so like nothing relevant and should be
treated as almost empty commit msg.

How do you expect us to understand anything from that if you write
NOTHING in the commit msg (except copying subject)?

Best regards,
Krzysztof