linux-kernel - RE: [PATCH v2] iio:frequency:adf4377: Fix duplicated soft reset mask

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Message-ID:
 <CY4PR03MB3399B1BF1A562DD3FBDF43179B94A@CY4PR03MB3399.namprd03.prod.outlook.com>
Date: Fri, 23 Jan 2026 10:08:54 +0000
From: "Miclaus, Antoniu" <Antoniu.Miclaus@...log.com>
To: Jonathan Cameron <jic23@...nel.org>,
        Andy Shevchenko
	<andy.shevchenko@...il.com>
CC: SeungJu Cheon <suunj1331@...il.com>, "lars@...afoo.de" <lars@...afoo.de>,
        "andriy.shevchenko@...el.com" <andriy.shevchenko@...el.com>,
        David Lechner
	<dlechner@...libre.com>,
        "andy@...nel.org" <andy@...nel.org>,
        "linux-iio@...r.kernel.org" <linux-iio@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Hennerich,
 Michael" <Michael.Hennerich@...log.com>,
        "Sa, Nuno" <Nuno.Sa@...log.com>
Subject: RE: [PATCH v2] iio:frequency:adf4377: Fix duplicated soft reset mask

> -----Original Message-----
> From: Jonathan Cameron <jic23@...nel.org>
> Sent: Friday, January 23, 2026 11:44 AM
> To: Andy Shevchenko <andy.shevchenko@...il.com>; Hennerich, Michael
> <Michael.Hennerich@...log.com>; Sa, Nuno <Nuno.Sa@...log.com>
> Cc: SeungJu Cheon <suunj1331@...il.com>; Miclaus, Antoniu
> <Antoniu.Miclaus@...log.com>; lars@...afoo.de;
> andriy.shevchenko@...el.com; David Lechner <dlechner@...libre.com>;
> andy@...nel.org; linux-iio@...r.kernel.org; linux-kernel@...r.kernel.org
> Subject: Re: [PATCH v2] iio:frequency:adf4377: Fix duplicated soft reset mask
> 
> [External]
> 
> On Sun, 11 Jan 2026 12:09:25 +0000
> Jonathan Cameron <jic23@...nel.org> wrote:
> 
> > On Wed, 31 Dec 2025 13:19:46 +0200
> > Andy Shevchenko <andy.shevchenko@...il.com> wrote:
> >
> > > On Tue, Dec 30, 2025 at 3:21 PM SeungJu Cheon
> <suunj1331@...il.com> wrote:
> > > >
> > > > The regmap_read_poll_timeout() uses
> ADF4377_0000_SOFT_RESET_R_MSK
> > > > twice instead of checking both SOFT_RESET_MSK (bit 0) and
> > > > SOFT_RESET_R_MSK (bit 7). This causes incomplete reset status check.
> > >
> > > an incomplete
> > >
> > > > Fix by using both masks as done in regmap_update_bits() above.
> > >
> > > ...
> > >
> > >
> > > May I ask how you tested this? Logically from the code it sounds
> > > correct, but I haven't read the datasheet yet, so I can't tell if this
> > > is the expected value to read or not.
> > >
> > >
> > > >         return regmap_read_poll_timeout(st->regmap, 0x0, read_val,
> > > > -                                       !(read_val & (ADF4377_0000_SOFT_RESET_R_MSK
> |
> > > > +                                       !(read_val & (ADF4377_0000_SOFT_RESET_MSK |
> > > >                                         ADF4377_0000_SOFT_RESET_R_MSK)), 200, 200 *
> 100);
> > >
> > > Okay, I opened the datasheet, and the below is what I read there. The
> > > code first sets the SOFT_RESET_R and SOFT_RESET bits to "1", and waits
> > > for them to be cleared. But the Table 43 does not mention that
> > > SOFT_RESET_R is auto cleaned, and actually I don't see with a brief
> > > look what the "repeat of" term means.
> > >
> > > And for normal operation they needs to be 0ed as per:
> > >   "SOFT_RESET, SOFT_RESET_R, RST_SYS, and ADC_ST_CNV are the only
> > > remaining RW bit fields not mentioned yet, and must also be set to
> > > their POR state (see Table 34)."
> > >
> > > With that said, I would wait for AD people to clarify the programming
> > > workflow here.
> > >
> >
> > Small kernel development process thing as well. Please don't send a v2 in
> reply to a v1.
> > It can become very confusing if we end up with a larger number of versions.
> > Much better to just post a new thread for each version, and include
> > a link back to the lore archive of the previous version in your cover letter.
> >
> > Also from a practical point of view, it ends up pages up in people's inboxes
> and
> > so is is less likely to get reviewed!
> >
> > Thanks
> >
> > Jonathan
> >
> ADI folk. This is waiting for one of you to take a look at the questions Andy
> raised.

Yep, it's a straightforward copy-paste typo - SOFT_RESET_R_MSK is OR'd with itself, so we're only
 checking BIT(7). Since we set both bits before polling, we should be waiting for both to clear.

Regards,
Antoniu

> Thanks!
> 
> Jonathan