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Message-ID: <aXNWQ-ocutEQoPJz@smile.fi.intel.com>
Date: Fri, 23 Jan 2026 13:06:43 +0200
From: "andriy.shevchenko@...el.com" <andriy.shevchenko@...el.com>
To: "Miclaus, Antoniu" <Antoniu.Miclaus@...log.com>
Cc: Jonathan Cameron <jic23@...nel.org>,
	Andy Shevchenko <andy.shevchenko@...il.com>,
	SeungJu Cheon <suunj1331@...il.com>,
	"lars@...afoo.de" <lars@...afoo.de>,
	David Lechner <dlechner@...libre.com>,
	"andy@...nel.org" <andy@...nel.org>,
	"linux-iio@...r.kernel.org" <linux-iio@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"Hennerich, Michael" <Michael.Hennerich@...log.com>,
	"Sa, Nuno" <Nuno.Sa@...log.com>
Subject: Re: [PATCH v2] iio:frequency:adf4377: Fix duplicated soft reset mask

On Fri, Jan 23, 2026 at 10:08:54AM +0000, Miclaus, Antoniu wrote:
> > From: Jonathan Cameron <jic23@...nel.org>
> > Sent: Friday, January 23, 2026 11:44 AM
> > On Sun, 11 Jan 2026 12:09:25 +0000
> > Jonathan Cameron <jic23@...nel.org> wrote:
> > > On Wed, 31 Dec 2025 13:19:46 +0200
> > > Andy Shevchenko <andy.shevchenko@...il.com> wrote:
> > > > On Tue, Dec 30, 2025 at 3:21 PM SeungJu Cheon
> > <suunj1331@...il.com> wrote:

...

> > > > May I ask how you tested this? Logically from the code it sounds
> > > > correct, but I haven't read the datasheet yet, so I can't tell if this
> > > > is the expected value to read or not.
> > > >
> > > >
> > > > >         return regmap_read_poll_timeout(st->regmap, 0x0, read_val,
> > > > > -                                       !(read_val & (ADF4377_0000_SOFT_RESET_R_MSK
> > |
> > > > > +                                       !(read_val & (ADF4377_0000_SOFT_RESET_MSK |
> > > > >                                         ADF4377_0000_SOFT_RESET_R_MSK)), 200, 200 *
> > 100);
> > > >
> > > > Okay, I opened the datasheet, and the below is what I read there. The
> > > > code first sets the SOFT_RESET_R and SOFT_RESET bits to "1", and waits
> > > > for them to be cleared. But the Table 43 does not mention that
> > > > SOFT_RESET_R is auto cleaned, and actually I don't see with a brief
> > > > look what the "repeat of" term means.
> > > >
> > > > And for normal operation they needs to be 0ed as per:
> > > >   "SOFT_RESET, SOFT_RESET_R, RST_SYS, and ADC_ST_CNV are the only
> > > > remaining RW bit fields not mentioned yet, and must also be set to
> > > > their POR state (see Table 34)."
> > > >
> > > > With that said, I would wait for AD people to clarify the programming
> > > > workflow here.
> > >
> > > Small kernel development process thing as well. Please don't send a v2 in
> > reply to a v1.
> > > It can become very confusing if we end up with a larger number of versions.
> > > Much better to just post a new thread for each version, and include
> > > a link back to the lore archive of the previous version in your cover letter.
> > >
> > > Also from a practical point of view, it ends up pages up in people's inboxes
> > and
> > > so is is less likely to get reviewed!
> > >
> > ADI folk. This is waiting for one of you to take a look at the questions Andy
> > raised.
> 
> Yep, it's a straightforward copy-paste typo - SOFT_RESET_R_MSK is OR'd with
> itself, so we're only checking BIT(7). Since we set both bits before polling,
> we should be waiting for both to clear.

Can you clarify more on this, please? Datasheet is unclear about the second bit
to be self-cleared.

And are you going to fix documentation (Datasheet)?

-- 
With Best Regards,
Andy Shevchenko



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