linux-kernel - Re: [PATCH v2 2/2] interconnect: qcom: glymur: Add Mahua SoC support

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Message-ID: <c01b5b95-2aac-482e-80d0-89cc1599bc1b@oss.qualcomm.com>
Date: Tue, 27 Jan 2026 13:01:05 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Raviteja Laggyshetty <raviteja.laggyshetty@....qualcomm.com>,
        Georgi Djakov <djakov@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>,
        Mike Tipton <mike.tipton@....qualcomm.com>
Cc: linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Odelu Kukatla <odelu.kukatla@....qualcomm.com>
Subject: Re: [PATCH v2 2/2] interconnect: qcom: glymur: Add Mahua SoC support

On 1/27/26 4:22 AM, Raviteja Laggyshetty wrote:
> Mahua is a derivative of the Glymur SoC. Extend the
> Glymur driver to support Mahua by:
> 
>   1. Adding new node definitions for interconnects that differ from Glymur
>      (Config NoC, High-Speed Coherent NoC, PCIe West ANOC/Slave NoC).
>   2. Reusing existing Glymur definitions for identical NoCs.
>   3. Overriding the channel and buswidth, with Mahua specific values for
>      the differing NoCs
> 
> Co-developed-by: Odelu Kukatla <odelu.kukatla@....qualcomm.com>
> Signed-off-by: Odelu Kukatla <odelu.kukatla@....qualcomm.com>
> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@....qualcomm.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>

Konrad