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Message-ID: <20260127120941.00000090@huawei.com>
Date: Tue, 27 Jan 2026 12:09:41 +0000
From: Jonathan Cameron <jonathan.cameron@...wei.com>
To: Ryan Roberts <ryan.roberts@....com>
CC: Will Deacon <will@...nel.org>, Ard Biesheuvel <ardb@...nel.org>, Catalin
 Marinas <catalin.marinas@....com>, Mark Rutland <mark.rutland@....com>, Linus
 Torvalds <torvalds@...ux-foundation.org>, Oliver Upton
	<oliver.upton@...ux.dev>, Marc Zyngier <maz@...nel.org>, "Dev Jain"
	<dev.jain@....com>, Linu Cherian <Linu.Cherian@....com>,
	<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 07/13] arm64: mm: Simplify __TLBI_RANGE_NUM() macro

On Mon, 19 Jan 2026 17:21:54 +0000
Ryan Roberts <ryan.roberts@....com> wrote:

> From: Will Deacon <will@...nel.org>
> 
> Since commit e2768b798a19 ("arm64/mm: Modify range-based tlbi to
> decrement scale"), we don't need to clamp the 'pages' argument to fit
> the range for the specified 'scale' as we know that the upper bits will
> have been processed in a prior iteration.
> 
> Drop the clamping and simplify the __TLBI_RANGE_NUM() macro.
> 
> Signed-off-by: Will Deacon <will@...nel.org>
> Reviewed-by: Ryan Roberts <ryan.roberts@....com>
> Reviewed-by: Dev Jain <dev.jain@....com>
> Signed-off-by: Ryan Roberts <ryan.roberts@....com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@...wei.com>

> ---
>  arch/arm64/include/asm/tlbflush.h | 6 +-----
>  1 file changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
> index a8513b649fe5..cac7768f3483 100644
> --- a/arch/arm64/include/asm/tlbflush.h
> +++ b/arch/arm64/include/asm/tlbflush.h
> @@ -207,11 +207,7 @@ static inline void __tlbi_level(tlbi_op op, u64 addr, u32 level)
>   * range.
>   */
>  #define __TLBI_RANGE_NUM(pages, scale)					\
> -	({								\
> -		int __pages = min((pages),				\
> -				  __TLBI_RANGE_PAGES(31, (scale)));	\
> -		(__pages >> (5 * (scale) + 1)) - 1;			\
> -	})
> +	(((pages) >> (5 * (scale) + 1)) - 1)
>  
>  /*
>   *	TLB Invalidation


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