linux-kernel - Re: [PATCH v7 0/2] PCI: Add initial support for handling PCIe M.2 connectors in devicetree

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Message-ID: <20260128165404.GA421308@bhelgaas>
Date: Wed, 28 Jan 2026 10:54:04 -0600
From: Bjorn Helgaas <helgaas@...nel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@....qualcomm.com>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>,
	Manivannan Sadhasivam <mani@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Bartosz Golaszewski <brgl@...ev.pl>,
	Damien Le Moal <dlemoal@...nel.org>,
	Niklas Cassel <cassel@...nel.org>,
	Linus Walleij <linus.walleij@...aro.org>,
	Bartosz Golaszewski <brgl@...nel.org>, linux-kernel@...r.kernel.org,
	linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
	linux-arm-msm@...r.kernel.org,
	Stephan Gerhold <stephan.gerhold@...aro.org>,
	Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
	linux-pm@...r.kernel.org, linux-ide@...r.kernel.org,
	Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Subject: Re: [PATCH v7 0/2] PCI: Add initial support for handling PCIe M.2
 connectors in devicetree

On Wed, Jan 28, 2026 at 09:07:14PM +0530, Manivannan Sadhasivam wrote:
> Hi,
> 
> This series is an initial attempt to support the PCIe M.2 connectors in the
> kernel and devicetree binding. The PCIe M.2 connectors as defined in the PCI
> Express M.2 Specification are widely used in Notebooks/Tablet form factors (even
> in PCs). On the ACPI platforms, power to these connectors are mostly handled by
> the firmware/BIOS and the kernel never bothered to directly power manage them as
> like other PCIe connectors. But on the devicetree platforms, the kernel needs to
> power manage these connectors with the help of the devicetree description. But
> so far, there is no proper representation of the M.2 connectors in devicetree
> binding. This forced the developers to fake the M.2 connectors as PMU nodes [1]
> and fixed regulators in devicetree.
> 
> So to properly support the M.2 connectors in devicetree platforms, this series
> introduces the devicetree binding for Mechanical Key M connector as an example
> and also the corresponding pwrseq driver and PCI changes in kernel to driver the
> connector.
> 
> The Mechanical Key M connector is used to connect SSDs to the host machine over
> PCIe/SATA interfaces. Due to the hardware constraints, this series only adds
> support for driving the PCIe interface of the connector in the kernel.
> 
> Also, the optional interfaces supported by the Key M connectors are not
> supported in the driver and left for the future enhancements.
> 
> Testing
> =======
> 
> This series, together with the devicetree changes [2] [3] were tested on the
> Qualcomm X1e based Lenovo Thinkpad T14s Laptop which has the NVMe SSD connected
> over PCIe.
> 
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts?h=v6.18-rc4&id=d09ab685a8f51ba412d37305ea62628a01cbea57
> [2] https://github.com/Mani-Sadhasivam/linux/commit/40120d02219f34d2040ffa6328f0d406b1e4c04d
> [3] https://github.com/Mani-Sadhasivam/linux/commit/ff6c3075836cc794a3700b0ec6a4a9eb21d14c6f
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@....qualcomm.com>
> ---
> Changes in v7:
> - Dropped the pwrseq and binding patches as they got applied
> - Rebased on top of pci/pwrctrl branch
> - Link to v6: https://lore.kernel.org/r/20260122-pci-m2-v6-0-575da9f97239@oss.qualcomm.com
> 
> Changes in v6:
> - Used 'ports' to describe interfaces instead of endpoints in the binding
> - Added GPIOs and USB to the example in binding
> - Incorporated minor comments in the pwrseq driver
> - Dropped the ata binding patch as it got applied
> - Link to v5: https://lore.kernel.org/r/20260107-pci-m2-v5-0-8173d8a72641@oss.qualcomm.com
> 
> Changes in v5:
> - used of_node_get() and devm_action to free regulators
> - Link to v4: https://lore.kernel.org/r/20251228-pci-m2-v4-0-5684868b0d5f@oss.qualcomm.com
> 
> Changes in v4:
> - Added graph property to SATA in this series and PCI to dtschema:
>   https://github.com/devicetree-org/dt-schema/pull/180
> - Used 'i2c-parent' instead of SMBus port
> - Reworded the -gpios property description
> - Rebased on top of v6.19-rc1
> - Link to v3: https://lore.kernel.org/r/20251125-pci-m2-v3-0-c528042aea47@oss.qualcomm.com
> 
> Changes in v3:
> - Changed the VIO supply name as per dtschema
> - Added explicit endpoint properties to port 0 node for host I/F
> - Used scope based cleanup for OF node in pwrseq driver
> - Collected review tags
> - Link to v2: https://lore.kernel.org/r/20251108-pci-m2-v2-0-e8bc4d7bf42d@oss.qualcomm.com
> 
> Changes in v2:
> - Incorporated comments from Bartosz and Frank for pwrseq and dt-binding
>   patches, especially adding the pwrseq match() code.
> - Link to v1: https://lore.kernel.org/r/20251105-pci-m2-v1-0-84b5f1f1e5e8@oss.qualcomm.com
> 
> ---
> Manivannan Sadhasivam (2):
>       PCI/pwrctrl: Add support for handling PCIe M.2 connectors
>       PCI/pwrctrl: Create pwrctrl device if the graph port is found
> 
>  drivers/pci/pwrctrl/Kconfig |  1 +
>  drivers/pci/pwrctrl/core.c  |  7 ++++---
>  drivers/pci/pwrctrl/slot.c  | 31 +++++++++++++++++++++++++++----
>  3 files changed, 32 insertions(+), 7 deletions(-)
> ---
> base-commit: 3e7f562e20ee87a25e104ef4fce557d39d62fa85
> change-id: 20251103-pci-m2-7633631b6faa
> 
> Best regards,
> -- 
> Manivannan Sadhasivam <manivannan.sadhasivam@....qualcomm.com>
> 

Applied to pci/pwrctrl for v6.20, thanks!