linux-kernel - RE: [PATCH] clk: imx8mq: Correct the CSI PHY sels

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID:
 <VE1PR04MB7213B29EE6C74BEB0A6332AB8791A@VE1PR04MB7213.eurprd04.prod.outlook.com>
Date: Wed, 28 Jan 2026 04:50:14 +0000
From: Jacky Bai <ping.bai@....com>
To: Peng Fan <peng.fan@....com>, Sebastian Krzyszkowiak
	<sebastian.krzyszkowiak@...i.sm>, Abel Vesa <abelvesa@...nel.org>, Michael
 Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Shawn
 Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>, Pengutronix
 Kernel Team <kernel@...gutronix.de>, Fabio Estevam <festevam@...il.com>,
	Lucas Stach <l.stach@...gutronix.de>, Anson Huang <anson.huang@....com>
CC: "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
	"imx@...ts.linux.dev" <imx@...ts.linux.dev>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "kernel@...i.sm" <kernel@...i.sm>
Subject: RE: [PATCH] clk: imx8mq: Correct the CSI PHY sels

> Subject: RE: [PATCH] clk: imx8mq: Correct the CSI PHY sels
> 
> Hi Sebastian,
> 
> Thanks for your patch!
> 
> > Subject: [PATCH] clk: imx8mq: Correct the CSI PHY sels
> >
> > According to i.MX 8M Quad Reference Manual (Section 5.1.2 Table 5-1)
> > MIPI_CSI1_PHY_REF_CLK_ROOT and MIPI_CSI2_PHY_REF_CLK_ROOT have
> > SYSTEM_PLL2_DIV3 available as their second source, which corresponds
> > to sys2_pll_333m rather than sys2_pll_125m.
> 
> After check the RM, you are right. But our internal doc shows it is
> sys2_pll_125m, so I need to check the RTL code, then back you later regarding
> this patch.
> 

The changes are correct, the mux select '1' should be sys2_pll_333m.

BR
> Thanks,
> Peng.
> 
> >
> > Fixes: b80522040cd3 ("clk: imx: Add clock driver for i.MX8MQ CCM")
> > Signed-off-by: Sebastian Krzyszkowiak
> > <sebastian.krzyszkowiak@...i.sm>
> > ---
> >  drivers/clk/imx/clk-imx8mq.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-
> > imx8mq.c index f70ed231b92d..cedc8a02aa1f 100644
> > --- a/drivers/clk/imx/clk-imx8mq.c
> > +++ b/drivers/clk/imx/clk-imx8mq.c
> > @@ -237,7 +237,7 @@ static const char * const imx8mq_dsi_esc_sels[] =
> > {"osc_25m", "sys2_pll_100m", "
> >  static const char * const imx8mq_csi1_core_sels[] = {"osc_25m",
> > "sys1_pll_266m", "sys2_pll_250m", "sys1_pll_800m",
> >                                               "sys2_pll_1000m",
> > "sys3_pll_out", "audio_pll2_out", "video_pll1_out", };
> >
> > -static const char * const imx8mq_csi1_phy_sels[] = {"osc_25m",
> > "sys2_pll_125m", "sys2_pll_100m", "sys1_pll_800m",
> > +static const char * const imx8mq_csi1_phy_sels[] = {"osc_25m",
> > +"sys2_pll_333m", "sys2_pll_100m", "sys1_pll_800m",
> >                                              "sys2_pll_1000m",
> > "clk_ext2", "audio_pll2_out", "video_pll1_out", };
> >
> >  static const char * const imx8mq_csi1_esc_sels[] = {"osc_25m",
> > "sys2_pll_100m", "sys1_pll_80m", "sys1_pll_800m", @@ -246,7
> > +246,7 @@ static const char * const imx8mq_csi1_esc_sels[] =
> > {"osc_25m", "sys2_pll_100m",  static const char * const
> > imx8mq_csi2_core_sels[] = {"osc_25m", "sys1_pll_266m",
> > "sys2_pll_250m", "sys1_pll_800m",
> >                                               "sys2_pll_1000m",
> > "sys3_pll_out", "audio_pll2_out", "video_pll1_out", };
> >
> > -static const char * const imx8mq_csi2_phy_sels[] = {"osc_25m",
> > "sys2_pll_125m", "sys2_pll_100m", "sys1_pll_800m",
> > +static const char * const imx8mq_csi2_phy_sels[] = {"osc_25m",
> > +"sys2_pll_333m", "sys2_pll_100m", "sys1_pll_800m",
> >                                              "sys2_pll_1000m",
> > "clk_ext2", "audio_pll2_out", "video_pll1_out", };
> >
> >  static const char * const imx8mq_csi2_esc_sels[] = {"osc_25m",
> > "sys2_pll_100m", "sys1_pll_80m", "sys1_pll_800m",
> >
> > ---
> > base-commit: 63804fed149a6750ffd28610c5c1c98cce6bd377
> > change-id: 20260128-imx8mq-csi-clk-2da0c4741ed6
> >
> > Best regards,
> > --
> > Sebastian Krzyszkowiak <sebastian.krzyszkowiak@...i.sm>