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Message-ID: <85EFBB88D70FB64F+aXnXtS35RG_U6MeC@kernel.org>
Date: Wed, 28 Jan 2026 17:32:37 +0800
From: Troy Mitchell <troy.mitchell@...ux.spacemit.com>
To: Vivian Wang <wangruikang@...as.ac.cn>,
Linus Walleij <linusw@...nel.org>,
Bartosz Golaszewski <brgl@...nel.org>, Yixun Lan <dlan@...too.org>,
Alex Elder <elder@...cstar.com>
Cc: Bartosz Golaszewski <brgl@...ev.pl>, linux-gpio@...r.kernel.org,
linux-riscv@...ts.infradead.org, spacemit@...ts.linux.dev,
linux-kernel@...r.kernel.org,
Troy Mitchell <troy.mitchell@...ux.spacemit.com>
Subject: Re: [PATCH] gpio: spacemit-k1: Use PDR for pin direction, not SDR/CDR
On Tue, Jan 27, 2026 at 10:58:49AM +0800, Vivian Wang wrote:
> On the SpacemiT GPIO controller, the direction control register PDR is
> readable and writable [1]. Therefore, implement direction control by
> using PDR as dirout, and don't mark it as unreadable.
>
> The original implementation, using SDR as dirout and CDR as dirin, is
> not actually a supported configuration by gpio-mmio. The hardware
> supports changing the direction of some pins atomically by writing a
> value with the corresponding bits set to SDR (set as output) or to CDR
> (set as input). However, gpio-mmio does not actually handle this.
>
> Using only PDR as dirout to match the expectations of gpio-mmio. This
> also allows us to avoid clobbering potentially important GPIO direction
> configurations set by pre-Linux boot stages.
>
> Found while trying to add PCIe support to OrangePi RV2, where the
> regulator (controlled by GPIO 116) turns off on boot while some other
> GPIO pin in the same bank is touched, which is not desirable.
>
> Link: https://developer.spacemit.com/documentation?token=Rn9Kw3iFHirAMgkIpTAcV2Arnkf#18.4-gpio # [1]
> Fixes: d00553240ef8 ("gpio: spacemit: add support for K1 SoC")
> Signed-off-by: Vivian Wang <wangruikang@...as.ac.cn>
> ---
> Tested on K1 only - help with K3 testing would be appreciated.
Confirmed that PDR is also R/W on K3. Thanks!
Reviewed-by: Troy Mitchell <troy.mitchell@...ux.spacemit.com>
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