linux-kernel - Re: (subset) [PATCH v4 00/15] spi: cadence-qspi: Add Renesas RZ/N1 support

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Message-Id: <176968523282.21695.1970063208785534195.b4-ty@kernel.org>
Date: Thu, 29 Jan 2026 11:13:52 +0000
From: Mark Brown <broonie@...nel.org>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Geert Uytterhoeven <geert+renesas@...der.be>, 
 Magnus Damm <magnus.damm@...il.com>, Vaishnav Achath <vaishnav.a@...com>, 
 "Miquel Raynal (Schneider Electric)" <miquel.raynal@...tlin.com>
Cc: Thomas Petazzoni <thomas.petazzoni@...tlin.com>, 
 Hervé Codina <herve.codina@...tlin.com>, 
 Wolfram Sang <wsa+renesas@...g-engineering.com>, 
 Vignesh Raghavendra <vigneshr@...com>, Santhosh Kumar K <s-k6@...com>, 
 Pratyush Yadav <pratyush@...nel.org>, 
 Pascal Eberhard <pascal.eberhard@...com>, linux-spi@...r.kernel.org, 
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
 linux-renesas-soc@...r.kernel.org
Subject: Re: (subset) [PATCH v4 00/15] spi: cadence-qspi: Add Renesas RZ/N1
 support

On Thu, 22 Jan 2026 16:13:25 +0100, Miquel Raynal (Schneider Electric) wrote:
> This series adds support for the QSPI controller available on Renesas
> RZ/N1S and RZ/N1D SoC. It has been tested with a custom board (see last
> SPI patch for details), but has been tested by Wolfram (thank you!) on
> the DB board.
> Link: https://lore.kernel.org/linux-devicetree/20260116114852.52948-2-wsa+renesas@sang-engineering.com/
> 
> Adding support for this SoC required a few adaptations in the Cadence
> QSPI driver. The bulk of the work is in the few last patches. Everything
> else is just misc style fixes and improvements which bothered me while I
> was wandering.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[01/15] spi: dt-bindings: cdns,qspi-nor: Drop label in example
        commit: ade3f7f883723cca5e1c967e574680b410226566
[02/15] spi: dt-bindings: cdns,qspi-nor: Add Renesas RZ/N1D400 to the list
        (no commit info)
[03/15] spi: cadence-qspi: Align definitions
        commit: 9dfc9c1c830717686908e2c16867d8dfae5cf5e7
[04/15] spi: cadence-qspi: Fix style and improve readability
        commit: aac733a9663682387013350b4470a81344960f5d
[05/15] spi: cadence-qspi: Fix ORing style and alignments
        commit: ec2da8bb0bc518ca5458d36de9aeec493ed5a790
[06/15] spi: cadence-qspi: Remove an useless operation
        commit: 453c5d60d896398c32854b683aff6d5b8386fa03
[07/15] spi: cadence-qspi: Make sure we filter out unsupported ops
        commit: bee085476d277e1f993cdec57e3c730f536594f0
[08/15] spi: cadence-qspi: Fix probe error path and remove
        commit: f18c8cfa4f1af2cf7d68d86989a7d6109acfa1bb
[09/15] spi: cadence-qspi: Try hard to disable the clocks
        commit: 612227b392eed94a3398dc03334a84a699a82276
[10/15] spi: cadence-qspi: Kill cqspi_jh7110_clk_init
        (no commit info)
[11/15] spi: cadence-qspi: Add a flag for controllers without indirect access support
        commit: ae62e7cf6ab52cebc83feb0bcb374082eaabbf5e
[12/15] spi: cadence-qspi: Make sure write protection is disabled
        commit: 590f2430733f1302a78ac405370b8f01038adbf5
[13/15] spi: cadence-qspi: Use a default value for cdns,fifo-width
        commit: 77ee3ba5d4152f01ba4674b0e0ae51f8a51250bf
[14/15] spi: cadence-qspi: Add support for the Renesas RZ/N1 controller
        (no commit info)

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark