linux-kernel - Re: [PATCH v2 5/8] arm64: dts: qcom: lemans: Enable CDSP cooling

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Message-ID: <3a1b3a2b-d73a-4dae-b866-14abec2ff18d@oss.qualcomm.com>
Date: Thu, 29 Jan 2026 17:40:56 +0530
From: Gaurav Kohli <gaurav.kohli@....qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
Cc: andersson@...nel.org, mathieu.poirier@...aro.org, robh@...nel.org,
        krzk+dt@...nel.org, conor+dt@...nel.org, rui.zhang@...el.com,
        lukasz.luba@....com, konradybcio@...nel.org, mani@...nel.org,
        casey.connolly@...aro.org, amit.kucheria@....qualcomm.com,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
        manaf.pallikunhi@....qualcomm.com
Subject: Re: [PATCH v2 5/8] arm64: dts: qcom: lemans: Enable CDSP cooling


On 1/29/2026 6:13 AM, Dmitry Baryshkov wrote:
> On Tue, Jan 27, 2026 at 09:27:19PM +0530, Gaurav Kohli wrote:
>> Unlike the CPU, the CDSP does not throttle its speed automatically
>> when it reaches high temperatures in Lemans.
>>
>> Set up CDSP cooling by throttling the cdsp when it reaches 105°C.
>>
>> Signed-off-by: Gaurav Kohli <gaurav.kohli@....qualcomm.com>
>> ---
>>   arch/arm64/boot/dts/qcom/lemans.dtsi | 138 ++++++++++++++++++++++++---
>>   1 file changed, 126 insertions(+), 12 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
>> index 808827b83553..c747dd534caa 100644
>> --- a/arch/arm64/boot/dts/qcom/lemans.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
>> @@ -7281,6 +7281,15 @@ compute-cb@11 {
>>   					};
>>   				};
>>   			};
>> +
>> +			cooling {
>> +				compatible = "qcom,qmi-cooling-cdsp";
>> +
>> +				cdsp_tmd0: cdsp-tmd0 {
> This question was already raised. Are there more than one cooling device
> for the DSP? If not, drop the subnodes.


Thanks Dmitry for review.

Yes, Each subsystem may support multiple thermal mitigation devices 
through remote TMD service.

So, need to define subnodes.


>> +					label = "cdsp_sw";
>> +					#cooling-cells = <2>;
>> +				};
>> +			};
>>   		};
>>   
>>   		nspb_noc: interconnect@...c0000 {