Message-ID: <aXzQULmTf4dju/LD@lizhi-Precision-Tower-5810>
Date: Fri, 30 Jan 2026 10:37:52 -0500
From: Frank Li <Frank.li@....com>
To: Sai Sree Kartheek Adivi <s-adivi@...com>
Cc: peter.ujfalusi@...il.com, vkoul@...nel.org, robh@...nel.org,
	krzk+dt@...nel.org, conor+dt@...nel.org, nm@...com,
	ssantosh@...nel.org, dmaengine@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, vigneshr@...com,
	r-sharma3@...com, gehariprasath@...com
Subject: Re: [PATCH v4 02/19] dmaengine: ti: k3-udma: move structs and enums
 to header file

On Fri, Jan 30, 2026 at 04:31:42PM +0530, Sai Sree Kartheek Adivi wrote:
> Move struct and enum definitions in k3-udma.c to k3-udma.h header file
> for better separation and re-use.
>
> Signed-off-by: Sai Sree Kartheek Adivi <s-adivi@...com>
> ---
Reviewed-by: Frank Li <Frank.Li@....com>
>  drivers/dma/ti/k3-udma.c | 259 +-------------------------------------
>  drivers/dma/ti/k3-udma.h | 261 +++++++++++++++++++++++++++++++++++++++
>  2 files changed, 262 insertions(+), 258 deletions(-)
>
> diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
> index 4cc64763de1f6..e0684d83f9791 100644
> --- a/drivers/dma/ti/k3-udma.c
> +++ b/drivers/dma/ti/k3-udma.c
> @@ -24,8 +24,8 @@
>  #include <linux/workqueue.h>
>  #include <linux/completion.h>
>  #include <linux/soc/ti/k3-ringacc.h>
> -#include <linux/soc/ti/ti_sci_protocol.h>
>  #include <linux/soc/ti/ti_sci_inta_msi.h>
> +#include <linux/soc/ti/ti_sci_protocol.h>
>  #include <linux/dma/k3-event-router.h>
>  #include <linux/dma/ti-cppi5.h>
>
> @@ -33,28 +33,6 @@
>  #include "k3-udma.h"
>  #include "k3-psil-priv.h"
>
> -struct udma_static_tr {
> -	u8 elsize; /* RPSTR0 */
> -	u16 elcnt; /* RPSTR0 */
> -	u16 bstcnt; /* RPSTR1 */
> -};
> -
> -struct udma_chan;
> -
> -enum k3_dma_type {
> -	DMA_TYPE_UDMA = 0,
> -	DMA_TYPE_BCDMA,
> -	DMA_TYPE_PKTDMA,
> -};
> -
> -enum udma_mmr {
> -	MMR_GCFG = 0,
> -	MMR_BCHANRT,
> -	MMR_RCHANRT,
> -	MMR_TCHANRT,
> -	MMR_LAST,
> -};
> -
>  static const char * const mmr_names[] = {
>  	[MMR_GCFG] = "gcfg",
>  	[MMR_BCHANRT] = "bchanrt",
> @@ -62,234 +40,6 @@ static const char * const mmr_names[] = {
>  	[MMR_TCHANRT] = "tchanrt",
>  };
>
> -struct udma_tchan {
> -	void __iomem *reg_rt;
> -
> -	int id;
> -	struct k3_ring *t_ring; /* Transmit ring */
> -	struct k3_ring *tc_ring; /* Transmit Completion ring */
> -	int tflow_id; /* applicable only for PKTDMA */
> -
> -};
> -
> -#define udma_bchan udma_tchan
> -
> -struct udma_rflow {
> -	int id;
> -	struct k3_ring *fd_ring; /* Free Descriptor ring */
> -	struct k3_ring *r_ring; /* Receive ring */
> -};
> -
> -struct udma_rchan {
> -	void __iomem *reg_rt;
> -
> -	int id;
> -};
> -
> -struct udma_oes_offsets {
> -	/* K3 UDMA Output Event Offset */
> -	u32 udma_rchan;
> -
> -	/* BCDMA Output Event Offsets */
> -	u32 bcdma_bchan_data;
> -	u32 bcdma_bchan_ring;
> -	u32 bcdma_tchan_data;
> -	u32 bcdma_tchan_ring;
> -	u32 bcdma_rchan_data;
> -	u32 bcdma_rchan_ring;
> -
> -	/* PKTDMA Output Event Offsets */
> -	u32 pktdma_tchan_flow;
> -	u32 pktdma_rchan_flow;
> -};
> -
> -struct udma_match_data {
> -	enum k3_dma_type type;
> -	u32 psil_base;
> -	bool enable_memcpy_support;
> -	u32 flags;
> -	u32 statictr_z_mask;
> -	u8 burst_size[3];
> -	struct udma_soc_data *soc_data;
> -};
> -
> -struct udma_soc_data {
> -	struct udma_oes_offsets oes;
> -	u32 bcdma_trigger_event_offset;
> -};
> -
> -struct udma_hwdesc {
> -	size_t cppi5_desc_size;
> -	void *cppi5_desc_vaddr;
> -	dma_addr_t cppi5_desc_paddr;
> -
> -	/* TR descriptor internal pointers */
> -	void *tr_req_base;
> -	struct cppi5_tr_resp_t *tr_resp_base;
> -};
> -
> -struct udma_rx_flush {
> -	struct udma_hwdesc hwdescs[2];
> -
> -	size_t buffer_size;
> -	void *buffer_vaddr;
> -	dma_addr_t buffer_paddr;
> -};
> -
> -struct udma_tpl {
> -	u8 levels;
> -	u32 start_idx[3];
> -};
> -
> -struct udma_dev {
> -	struct dma_device ddev;
> -	struct device *dev;
> -	void __iomem *mmrs[MMR_LAST];
> -	const struct udma_match_data *match_data;
> -	const struct udma_soc_data *soc_data;
> -
> -	struct udma_tpl bchan_tpl;
> -	struct udma_tpl tchan_tpl;
> -	struct udma_tpl rchan_tpl;
> -
> -	size_t desc_align; /* alignment to use for descriptors */
> -
> -	struct udma_tisci_rm tisci_rm;
> -
> -	struct k3_ringacc *ringacc;
> -
> -	struct work_struct purge_work;
> -	struct list_head desc_to_purge;
> -	spinlock_t lock;
> -
> -	struct udma_rx_flush rx_flush;
> -
> -	int bchan_cnt;
> -	int tchan_cnt;
> -	int echan_cnt;
> -	int rchan_cnt;
> -	int rflow_cnt;
> -	int tflow_cnt;
> -	unsigned long *bchan_map;
> -	unsigned long *tchan_map;
> -	unsigned long *rchan_map;
> -	unsigned long *rflow_gp_map;
> -	unsigned long *rflow_gp_map_allocated;
> -	unsigned long *rflow_in_use;
> -	unsigned long *tflow_map;
> -
> -	struct udma_bchan *bchans;
> -	struct udma_tchan *tchans;
> -	struct udma_rchan *rchans;
> -	struct udma_rflow *rflows;
> -
> -	struct udma_chan *channels;
> -	u32 psil_base;
> -	u32 atype;
> -	u32 asel;
> -};
> -
> -struct udma_desc {
> -	struct virt_dma_desc vd;
> -
> -	bool terminated;
> -
> -	enum dma_transfer_direction dir;
> -
> -	struct udma_static_tr static_tr;
> -	u32 residue;
> -
> -	unsigned int sglen;
> -	unsigned int desc_idx; /* Only used for cyclic in packet mode */
> -	unsigned int tr_idx;
> -
> -	u32 metadata_size;
> -	void *metadata; /* pointer to provided metadata buffer (EPIP, PSdata) */
> -
> -	unsigned int hwdesc_count;
> -	struct udma_hwdesc hwdesc[];
> -};
> -
> -enum udma_chan_state {
> -	UDMA_CHAN_IS_IDLE = 0, /* not active, no teardown is in progress */
> -	UDMA_CHAN_IS_ACTIVE, /* Normal operation */
> -	UDMA_CHAN_IS_TERMINATING, /* channel is being terminated */
> -};
> -
> -struct udma_tx_drain {
> -	struct delayed_work work;
> -	ktime_t tstamp;
> -	u32 residue;
> -};
> -
> -struct udma_chan_config {
> -	bool pkt_mode; /* TR or packet */
> -	bool needs_epib; /* EPIB is needed for the communication or not */
> -	u32 psd_size; /* size of Protocol Specific Data */
> -	u32 metadata_size; /* (needs_epib ? 16:0) + psd_size */
> -	u32 hdesc_size; /* Size of a packet descriptor in packet mode */
> -	bool notdpkt; /* Suppress sending TDC packet */
> -	int remote_thread_id;
> -	u32 atype;
> -	u32 asel;
> -	u32 src_thread;
> -	u32 dst_thread;
> -	enum psil_endpoint_type ep_type;
> -	bool enable_acc32;
> -	bool enable_burst;
> -	enum udma_tp_level channel_tpl; /* Channel Throughput Level */
> -
> -	u32 tr_trigger_type;
> -	unsigned long tx_flags;
> -
> -	/* PKDMA mapped channel */
> -	int mapped_channel_id;
> -	/* PKTDMA default tflow or rflow for mapped channel */
> -	int default_flow_id;
> -
> -	enum dma_transfer_direction dir;
> -};
> -
> -struct udma_chan {
> -	struct virt_dma_chan vc;
> -	struct dma_slave_config	cfg;
> -	struct udma_dev *ud;
> -	struct device *dma_dev;
> -	struct udma_desc *desc;
> -	struct udma_desc *terminated_desc;
> -	struct udma_static_tr static_tr;
> -	char *name;
> -
> -	struct udma_bchan *bchan;
> -	struct udma_tchan *tchan;
> -	struct udma_rchan *rchan;
> -	struct udma_rflow *rflow;
> -
> -	bool psil_paired;
> -
> -	int irq_num_ring;
> -	int irq_num_udma;
> -
> -	bool cyclic;
> -	bool paused;
> -
> -	enum udma_chan_state state;
> -	struct completion teardown_completed;
> -
> -	struct udma_tx_drain tx_drain;
> -
> -	/* Channel configuration parameters */
> -	struct udma_chan_config config;
> -	/* Channel configuration parameters (backup) */
> -	struct udma_chan_config backup_config;
> -
> -	/* dmapool for packet mode descriptors */
> -	bool use_dma_pool;
> -	struct dma_pool *hdesc_pool;
> -
> -	u32 id;
> -};
> -
>  static inline struct udma_dev *to_udma_dev(struct dma_device *d)
>  {
>  	return container_of(d, struct udma_dev, ddev);
> @@ -4073,13 +3823,6 @@ static struct platform_driver udma_driver;
>  static struct platform_driver bcdma_driver;
>  static struct platform_driver pktdma_driver;
>
> -struct udma_filter_param {
> -	int remote_thread_id;
> -	u32 atype;
> -	u32 asel;
> -	u32 tr_trigger_type;
> -};
> -
>  static bool udma_dma_filter_fn(struct dma_chan *chan, void *param)
>  {
>  	struct udma_chan_config *ucc;
> diff --git a/drivers/dma/ti/k3-udma.h b/drivers/dma/ti/k3-udma.h
> index 750720cd06911..37aa9ba5b4d18 100644
> --- a/drivers/dma/ti/k3-udma.h
> +++ b/drivers/dma/ti/k3-udma.h
> @@ -6,7 +6,12 @@
>  #ifndef K3_UDMA_H_
>  #define K3_UDMA_H_
>
> +#include <linux/dmaengine.h>
>  #include <linux/soc/ti/ti_sci_protocol.h>
> +#include <linux/dma/ti-cppi5.h>
> +
> +#include "../virt-dma.h"
> +#include "k3-psil-priv.h"
>
>  /* Global registers */
>  #define UDMA_REV_REG			0x0
> @@ -164,6 +169,7 @@ struct udma_dev;
>  struct udma_tchan;
>  struct udma_rchan;
>  struct udma_rflow;
> +struct udma_chan;
>
>  enum udma_rm_range {
>  	RM_RANGE_BCHAN = 0,
> @@ -186,6 +192,261 @@ struct udma_tisci_rm {
>  	struct ti_sci_resource *rm_ranges[RM_RANGE_LAST];
>  };
>
> +struct udma_static_tr {
> +	u8 elsize; /* RPSTR0 */
> +	u16 elcnt; /* RPSTR0 */
> +	u16 bstcnt; /* RPSTR1 */
> +};
> +
> +enum k3_dma_type {
> +	DMA_TYPE_UDMA = 0,
> +	DMA_TYPE_BCDMA,
> +	DMA_TYPE_PKTDMA,
> +};
> +
> +enum udma_mmr {
> +	MMR_GCFG = 0,
> +	MMR_BCHANRT,
> +	MMR_RCHANRT,
> +	MMR_TCHANRT,
> +	MMR_LAST,
> +};
> +
> +struct udma_filter_param {
> +	int remote_thread_id;
> +	u32 atype;
> +	u32 asel;
> +	u32 tr_trigger_type;
> +};
> +
> +struct udma_tchan {
> +	void __iomem *reg_rt;
> +
> +	int id;
> +	struct k3_ring *t_ring; /* Transmit ring */
> +	struct k3_ring *tc_ring; /* Transmit Completion ring */
> +	int tflow_id; /* applicable only for PKTDMA */
> +
> +};
> +
> +#define udma_bchan udma_tchan
> +
> +struct udma_rflow {
> +	int id;
> +	struct k3_ring *fd_ring; /* Free Descriptor ring */
> +	struct k3_ring *r_ring; /* Receive ring */
> +};
> +
> +struct udma_rchan {
> +	void __iomem *reg_rt;
> +
> +	int id;
> +};
> +
> +struct udma_oes_offsets {
> +	/* K3 UDMA Output Event Offset */
> +	u32 udma_rchan;
> +
> +	/* BCDMA Output Event Offsets */
> +	u32 bcdma_bchan_data;
> +	u32 bcdma_bchan_ring;
> +	u32 bcdma_tchan_data;
> +	u32 bcdma_tchan_ring;
> +	u32 bcdma_rchan_data;
> +	u32 bcdma_rchan_ring;
> +
> +	/* PKTDMA Output Event Offsets */
> +	u32 pktdma_tchan_flow;
> +	u32 pktdma_rchan_flow;
> +};
> +
> +struct udma_match_data {
> +	enum k3_dma_type type;
> +	u32 psil_base;
> +	bool enable_memcpy_support;
> +	u32 flags;
> +	u32 statictr_z_mask;
> +	u8 burst_size[3];
> +	struct udma_soc_data *soc_data;
> +};
> +
> +struct udma_soc_data {
> +	struct udma_oes_offsets oes;
> +	u32 bcdma_trigger_event_offset;
> +};
> +
> +struct udma_hwdesc {
> +	size_t cppi5_desc_size;
> +	void *cppi5_desc_vaddr;
> +	dma_addr_t cppi5_desc_paddr;
> +
> +	/* TR descriptor internal pointers */
> +	void *tr_req_base;
> +	struct cppi5_tr_resp_t *tr_resp_base;
> +};
> +
> +struct udma_rx_flush {
> +	struct udma_hwdesc hwdescs[2];
> +
> +	size_t buffer_size;
> +	void *buffer_vaddr;
> +	dma_addr_t buffer_paddr;
> +};
> +
> +struct udma_tpl {
> +	u8 levels;
> +	u32 start_idx[3];
> +};
> +
> +struct udma_dev {
> +	struct dma_device ddev;
> +	struct device *dev;
> +	void __iomem *mmrs[MMR_LAST];
> +	const struct udma_match_data *match_data;
> +	const struct udma_soc_data *soc_data;
> +
> +	struct udma_tpl bchan_tpl;
> +	struct udma_tpl tchan_tpl;
> +	struct udma_tpl rchan_tpl;
> +
> +	size_t desc_align; /* alignment to use for descriptors */
> +
> +	struct udma_tisci_rm tisci_rm;
> +
> +	struct k3_ringacc *ringacc;
> +
> +	struct work_struct purge_work;
> +	struct list_head desc_to_purge;
> +	spinlock_t lock;
> +
> +	struct udma_rx_flush rx_flush;
> +
> +	int bchan_cnt;
> +	int tchan_cnt;
> +	int echan_cnt;
> +	int rchan_cnt;
> +	int rflow_cnt;
> +	int tflow_cnt;
> +	unsigned long *bchan_map;
> +	unsigned long *tchan_map;
> +	unsigned long *rchan_map;
> +	unsigned long *rflow_gp_map;
> +	unsigned long *rflow_gp_map_allocated;
> +	unsigned long *rflow_in_use;
> +	unsigned long *tflow_map;
> +
> +	struct udma_bchan *bchans;
> +	struct udma_tchan *tchans;
> +	struct udma_rchan *rchans;
> +	struct udma_rflow *rflows;
> +
> +	struct udma_chan *channels;
> +	u32 psil_base;
> +	u32 atype;
> +	u32 asel;
> +};
> +
> +struct udma_desc {
> +	struct virt_dma_desc vd;
> +
> +	bool terminated;
> +
> +	enum dma_transfer_direction dir;
> +
> +	struct udma_static_tr static_tr;
> +	u32 residue;
> +
> +	unsigned int sglen;
> +	unsigned int desc_idx; /* Only used for cyclic in packet mode */
> +	unsigned int tr_idx;
> +
> +	u32 metadata_size;
> +	void *metadata; /* pointer to provided metadata buffer (EPIP, PSdata) */
> +
> +	unsigned int hwdesc_count;
> +	struct udma_hwdesc hwdesc[];
> +};
> +
> +enum udma_chan_state {
> +	UDMA_CHAN_IS_IDLE = 0, /* not active, no teardown is in progress */
> +	UDMA_CHAN_IS_ACTIVE, /* Normal operation */
> +	UDMA_CHAN_IS_TERMINATING, /* channel is being terminated */
> +};
> +
> +struct udma_tx_drain {
> +	struct delayed_work work;
> +	ktime_t tstamp;
> +	u32 residue;
> +};
> +
> +struct udma_chan_config {
> +	bool pkt_mode; /* TR or packet */
> +	bool needs_epib; /* EPIB is needed for the communication or not */
> +	u32 psd_size; /* size of Protocol Specific Data */
> +	u32 metadata_size; /* (needs_epib ? 16:0) + psd_size */
> +	u32 hdesc_size; /* Size of a packet descriptor in packet mode */
> +	bool notdpkt; /* Suppress sending TDC packet */
> +	int remote_thread_id;
> +	u32 atype;
> +	u32 asel;
> +	u32 src_thread;
> +	u32 dst_thread;
> +	enum psil_endpoint_type ep_type;
> +	bool enable_acc32;
> +	bool enable_burst;
> +	enum udma_tp_level channel_tpl; /* Channel Throughput Level */
> +
> +	u32 tr_trigger_type;
> +	unsigned long tx_flags;
> +
> +	/* PKDMA mapped channel */
> +	int mapped_channel_id;
> +	/* PKTDMA default tflow or rflow for mapped channel */
> +	int default_flow_id;
> +
> +	enum dma_transfer_direction dir;
> +};
> +
> +struct udma_chan {
> +	struct virt_dma_chan vc;
> +	struct dma_slave_config	cfg;
> +	struct udma_dev *ud;
> +	struct device *dma_dev;
> +	struct udma_desc *desc;
> +	struct udma_desc *terminated_desc;
> +	struct udma_static_tr static_tr;
> +	char *name;
> +
> +	struct udma_bchan *bchan;
> +	struct udma_tchan *tchan;
> +	struct udma_rchan *rchan;
> +	struct udma_rflow *rflow;
> +
> +	bool psil_paired;
> +
> +	int irq_num_ring;
> +	int irq_num_udma;
> +
> +	bool cyclic;
> +	bool paused;
> +
> +	enum udma_chan_state state;
> +	struct completion teardown_completed;
> +
> +	struct udma_tx_drain tx_drain;
> +
> +	/* Channel configuration parameters */
> +	struct udma_chan_config config;
> +	/* Channel configuration parameters (backup) */
> +	struct udma_chan_config backup_config;
> +
> +	/* dmapool for packet mode descriptors */
> +	bool use_dma_pool;
> +	struct dma_pool *hdesc_pool;
> +
> +	u32 id;
> +};
> +
>  /* Direct access to UDMA low lever resources for the glue layer */
>  int xudma_navss_psil_pair(struct udma_dev *ud, u32 src_thread, u32 dst_thread);
>  int xudma_navss_psil_unpair(struct udma_dev *ud, u32 src_thread,
> --
> 2.34.1
>

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