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Message-ID: <a39410ec-4054-40eb-a687-0f161cffff2c@nvidia.com>
Date: Fri, 30 Jan 2026 17:21:22 +0000
From: Jon Hunter <jonathanh@...dia.com>
To: Manikanta Maddireddy <mmaddireddy@...dia.com>, bhelgaas@...gle.com,
lpieralisi@...nel.org, kwilczynski@...nel.org, mani@...nel.org,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
thierry.reding@...il.com, jingoohan1@...il.com, vidyas@...dia.com,
cassel@...nel.org, 18255117159@....com
Cc: linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V4 04/22] PCI: tegra194: Apply pinctrl settings for both
PCIe RP and EP
On 26/01/2026 07:45, Manikanta Maddireddy wrote:
> From: Vidya Sagar <vidyas@...dia.com>
>
> PERST# and CLKREQ# pinctrl settings should be applied for both root port
> and endpoint mode. Move pinctrl_pm_select_default_state() function call
> from root port specific configuration function to probe().
>
> Signed-off-by: Vidya Sagar <vidyas@...dia.com>
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@...dia.com>
> ---
> V4:
> * None
>
> V3:
> * None
>
> V2:
> * None
>
> drivers/pci/controller/dwc/pcie-tegra194.c | 19 +++++++++++++------
> 1 file changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index 0b8c1a7ca232..04ff211deaea 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -1645,12 +1645,6 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
> goto fail_pm_get_sync;
> }
>
> - ret = pinctrl_pm_select_default_state(dev);
> - if (ret < 0) {
> - dev_err(dev, "Failed to configure sideband pins: %d\n", ret);
> - goto fail_pm_get_sync;
> - }
> -
> ret = tegra_pcie_init_controller(pcie);
> if (ret < 0) {
> dev_err(dev, "Failed to initialize controller: %d\n", ret);
> @@ -2106,6 +2100,19 @@ static int tegra_pcie_dw_probe(struct platform_device *pdev)
> pp = &pci->pp;
> pp->num_vectors = MAX_MSI_IRQS;
>
> + ret = pinctrl_pm_select_default_state(dev);
> + if (ret < 0) {
> + const char *level = KERN_ERR;
> +
> + if (ret == -EPROBE_DEFER)
> + level = KERN_DEBUG;
> +
> + dev_printk(level, dev,
> + "Failed to configure sideband pins: %d\n",
> + ret);
We can now use dev_err_probe() to handle the above and this becomes ...
if (ret < 0)
return dev_err_probe(dev, ret, "Failed to configure sideband pins: %d\n", ret);
> + return ret;
> + }
> +
> ret = tegra_pcie_dw_parse_dt(pcie);
> if (ret < 0) {
> const char *level = KERN_ERR;
--
nvpublic
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