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Message-ID: <20260205-cream-ocelot-of-courtesy-c9ebdf@quoll>
Date: Thu, 5 Feb 2026 12:55:37 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Raviteja Laggyshetty <raviteja.laggyshetty@....qualcomm.com>
Cc: Georgi Djakov <djakov@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Mike Tipton <mike.tipton@....qualcomm.com>, linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Odelu Kukatla <odelu.kukatla@....qualcomm.com>
Subject: Re: [PATCH v2 1/2] dt-bindings: interconnect: document the RPMh
Network-On-Chip interconnect in Mahua SoC
On Tue, Jan 27, 2026 at 03:22:06AM +0000, Raviteja Laggyshetty wrote:
> + oneOf:
> + - items:
> + - enum:
> + - qcom,mahua-clk-virt
> + - const: qcom,glymur-clk-virt
> + - items:
> + - enum:
> + - qcom,mahua-cnoc-main
> + - const: qcom,glymur-cnoc-main
> + - items:
> + - enum:
> + - qcom,mahua-system-noc
> + - const: qcom,glymur-system-noc
> + - items:
> + - enum:
> + - qcom,mahua-pcie-east-anoc
> + - const: qcom,glymur-pcie-east-anoc
> + - items:
> + - enum:
> + - qcom,mahua-aggre1-noc
> + - const: qcom,glymur-aggre1-noc
All these "items" blocks should be sorted by the fallback, so
qcom,glymur-aggre1-noc is before qcom,glymur-clk-virt.
> + - items:
> + - enum:
> + - qcom,mahua-aggre2-noc
> + - const: qcom,glymur-aggre2-noc
> + - items:
> + - enum:
> + - qcom,mahua-aggre3-noc
> + - const: qcom,glymur-aggre3-noc
> + - items:
> + - enum:
> + - qcom,mahua-aggre4-noc
> + - const: qcom,glymur-aggre4-noc
> + - items:
> + - enum:
> + - qcom,mahua-mmss-noc
> + - const: qcom,glymur-mmss-noc
> + - items:
> + - enum:
> + - qcom,mahua-pcie-east-slv-noc
> + - const: qcom,glymur-pcie-east-slv-noc
> + - items:
> + - enum:
> + - qcom,mahua-lpass-lpiaon-noc
> + - const: qcom,glymur-lpass-lpiaon-noc
> + - items:
> + - enum:
> + - qcom,mahua-lpass-lpicx-noc
> + - const: qcom,glymur-lpass-lpicx-noc
> + - items:
> + - enum:
> + - qcom,mahua-lpass-ag-noc
> + - const: qcom,glymur-lpass-ag-noc
> + - items:
> + - enum:
> + - qcom,mahua-nsinoc
> + - const: qcom,glymur-nsinoc
> + - items:
> + - enum:
> + - qcom,mahua-oobm-ss-noc
> + - const: qcom,glymur-oobm-ss-noc
> + - items:
> + - enum:
> + - qcom,mahua-nsp-noc
> + - const: qcom,glymur-nsp-noc
> + - enum:
> + - qcom,glymur-aggre1-noc
> + - qcom,glymur-aggre2-noc
> + - qcom,glymur-aggre3-noc
> + - qcom,glymur-aggre4-noc
> + - qcom,glymur-clk-virt
> + - qcom,glymur-cnoc-cfg
> + - qcom,glymur-cnoc-main
> + - qcom,glymur-hscnoc
> + - qcom,glymur-lpass-ag-noc
> + - qcom,glymur-lpass-lpiaon-noc
> + - qcom,glymur-lpass-lpicx-noc
> + - qcom,glymur-mc-virt
> + - qcom,glymur-mmss-noc
> + - qcom,glymur-nsinoc
> + - qcom,glymur-nsp-noc
> + - qcom,glymur-oobm-ss-noc
> + - qcom,glymur-pcie-east-anoc
> + - qcom,glymur-pcie-east-slv-noc
> + - qcom,glymur-pcie-west-anoc
> + - qcom,glymur-pcie-west-slv-noc
> + - qcom,glymur-system-noc
> + - qcom,mahua-mc-virt
> + - qcom,mahua-cnoc-cfg
> + - qcom,mahua-pcie-west-anoc
> + - qcom,mahua-pcie-west-slv-noc
> + - qcom,mahua-hscnoc
>
> reg:
> maxItems: 1
> @@ -63,6 +133,7 @@ allOf:
> enum:
> - qcom,glymur-clk-virt
> - qcom,glymur-mc-virt
> + - qcom,mahua-mc-virt
> then:
> properties:
> reg: false
> @@ -85,6 +156,20 @@ allOf:
> - description: aggre PCIE_4 WEST AXI clock
> - description: aggre PCIE_6 WEST AXI clock
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,mahua-pcie-west-anoc
> + then:
> + properties:
> + clocks:
> + items:
> + - description: aggre PCIE_3B WEST AXI clock
> + - description: aggre PCIE_4 WEST AXI clock
> + - description: aggre PCIE_6 WEST AXI clock
> +
> - if:
> properties:
> compatible:
> @@ -132,6 +217,7 @@ allOf:
> contains:
> enum:
> - qcom,glymur-pcie-west-anoc
> + - qcom,mahua-pcie-west-anoc
Messed sorting. I don't get why such trivialities are still happening...
> - qcom,glymur-pcie-east-anoc
> - qcom,glymur-aggre2-noc
> - qcom,glymur-aggre4-noc
>
> --
> 2.43.0
>
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