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Message-ID: <20260206-reoccupy-debrief-88ea7343b1f2@spud>
Date: Fri, 6 Feb 2026 20:28:44 +0000
From: Conor Dooley <conor@...nel.org>
To: linux-riscv@...ts.infradead.org,
Conor Dooley <conor@...nel.org>
Cc: Conor Dooley <conor.dooley@...rochip.com>,
Daire McNamara <daire.mcnamara@...rochip.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1] riscv: dts: microchip: add can resets to mpfs
From: Conor Dooley <conor.dooley@...rochip.com>
On Wed, 28 Jan 2026 20:50:33 +0000, Conor Dooley wrote:
> The can IP on PolarFire SoC requires the use of the blocks reset
> during normal operation, and the property is therefore required by the
> binding, causing a warning on the m100pfsevp board where it is default
> enabled:
> mpfs-m100pfsevp.dtb: can@...0c000 (microchip,mpfs-can): 'resets' is a required property
> Add the reset to both can nodes.
>
> [...]
Applied to riscv-soc-fixes, thanks!
[1/1] riscv: dts: microchip: add can resets to mpfs
https://git.kernel.org/conor/c/ff4b6bf7eef4
Thanks,
Conor.
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