lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID:
 <TY3PR01MB1134666C58E7057D7118708B68667A@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Date: Sat, 7 Feb 2026 11:24:27 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, biju.das.au <biju.das.au@...il.com>
CC: Thomas Gleixner <tglx@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
	Geert Uytterhoeven <geert+renesas@...der.be>, magnus.damm
	<magnus.damm@...il.com>, Prabhakar Mahadev Lad
	<prabhakar.mahadev-lad.rj@...renesas.com>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-renesas-soc@...r.kernel.org"
	<linux-renesas-soc@...r.kernel.org>
Subject: RE: [PATCH v3 2/9] dt-bindings: interrupt-controller:
 renesas,rzg2l-irqc: Document RZ/G3L SoC

Hi Krzysztof Kozlowski,

Thanks for the feedback.

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@...nel.org>
> Sent: 07 February 2026 10:36
> Subject: Re: [PATCH v3 2/9] dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3L SoC
> 
> On Fri, Feb 06, 2026 at 11:16:45AM +0000, Biju wrote:
> > From: Biju Das <biju.das.jz@...renesas.com>
> >
> > Document RZ/G3L (R9A08G046) IRQC bindings. The IRQC block on RZ/G3L
> > SoC is almost identical to one found on the RZ/G3S SoC with the
> > difference like it support more External IRQs, GPT Error Interrupts
> > and also has additional registers for GPT/MTU IRQ selection, shared
> > IRQ selection between external IRQ and TINT. Hence new generic
> > compatible string "renesas,r9a08g046-irqc" is added for RZ/G3L SoC.
> >
> > Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> > ---
> > v2->v3:
> >  * Dropped items and instead used enum for single compatible values
> >  * Add minItems for interrupts and interrupt-names properties of
> >    the RZ/{G2L,G2UL,Five,V2L} SoCs
> >  * Replaced maxItems->minItems for interrupts and interrupt-names
> >    properties of the RZ/G3L SoC.
> > v1->v2:
> >  * Simplified the binding using pattern
> 
> Where are lore links to previous dicussions? b4 adds them automatically.

Here is the link [1] and [2]. Next time I will add the lore links. Sorry for not adding.

V2:
[2] https://lore.kernel.org/all/20260205-polar-gifted-lionfish-ef8a8d@quoll/
V1:
[1] https://lore.kernel.org/all/20260204142320.103184-2-biju.das.jz@bp.renesas.com/

Cheers,
Biju

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ