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Message-ID:
 <OSQPR06MB72520084144325D548E36AD78B65A@OSQPR06MB7252.apcprd06.prod.outlook.com>
Date: Mon, 9 Feb 2026 02:25:25 +0000
From: Billy Tsai <billy_tsai@...eedtech.com>
To: Linus Walleij <linusw@...nel.org>
CC: Tony Lindgren <tony@...mide.com>, Haojian Zhuang
	<haojian.zhuang@...aro.org>, "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-omap@...r.kernel.org"
	<linux-omap@...r.kernel.org>, "linux-gpio@...r.kernel.org"
	<linux-gpio@...r.kernel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "andrew@...econstruct.com.au"
	<andrew@...econstruct.com.au>, BMC-SW <BMC-SW@...eedtech.com>
Subject: Re: [PATCH v2 0/3] pinctrl: single: bit-per-mux DT flexibility, probe
 robustness, and consistent pinconf offsets

> > On Fri, Feb 6, 2026 at 8:24 AM Billy Tsai <billy_tsai@...eedtech.com> wrote:
> >
> > > > I understand the preference is to keep pinctrl-single minimal and move
> > > > the bit-per-mux handling into a separate, more targeted driver built on
> > > > top of the GENERIC_PINMUX/GENERIC_PINCONF helpers, rather than extending
> > > > pinctrl-single itself.
> > > >
> > > > Based on that, I’ll look into refactoring this into a
> > > > pinctrl-single-bit style driver that covers bit-per-mux / bit-per-pin
> > > > layouts generically (including AST2700), while keeping pinctrl-single
> > > > focused on the simpler register models.
> > > >
> > > > One additional point I’d like to raise is the handling of pre-reserved
> > > > MMIO regions.
> > > >
> > > > On AST2700 systems, the SCU register range containing the pinctrl
> > > > registers is commonly reserved by a top-level syscon node or by firmware.
> > > > In this setup, devm_request_mem_region() can return -EBUSY even though the
> > > > registers are valid and intended to be shared, which currently causes the
> > > > driver to fail probing and leaves pinmux unconfigured.
> > > >
> > > > When moving to a separate targeted driver, would the preferred approach
> > > > be to treat this condition as a warning and continue probing, or is there
> > > > an alternative pattern you’d recommend for handling shared SCU-style
> > > > register blocks in pinctrl drivers?
> >
> > > Can't you just base this entire driver on syscon which uses regmap-mmio
> > > to abstract and solve this problem?
> >
> > > The syscon is entirely designed as a singleton owning all registers
> > > and handing them out to subdrivers.
> >
> > Agreed that syscon/regmap would be ideal. The main issue with
> > pinctrl-single is that it is fundamentally MMIO-based: it always
> > requests and ioremaps the register range and performs raw MMIO accesses,
> > with no regmap integration. Adapting it to act as a syscon consumer would
> > require a larger architectural rework of the driver.
> > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pinctrl/pinctrl-single.c?h=v6.19-rc6#n230

> These comments were under the assumtion that you do what Tony & I
> suggested and create a completely new driver for these use cases.

> Sorry if it was unclear.

Hi Linus and Tony,

Understood on writing a new targeted driver.

To make sure I align with your expectations:
1) Would you prefer the new driver to be fully standalone (using the
   GENERIC_PIN* helpers + syscon/regmap-mmio), rather than trying to
   refactor/export helpers from pinctrl-single? My assumption is that
   pinctrl-single remains unchanged and continues to support existing
   users and bindings, while the new driver offers a simpler and more
   maintainable option for SoCs with bit-per-mux / bit-per-pin hardware
   layouts.
   Action item: Introduce a new pinctrl-single-bit.c driver and DT
   binding, which can also cover the existing bit-per-mux logic currently
   in pinctrl-single.c.

2) For the syscon/regmap hookup, is it acceptable to add a syscon phandle
   property in DT (e.g. "syscon = <&scu>;") for the new driver to obtain
   the regmap, or do you prefer a different binding/property name?

Thanks,
Billy

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