netdev - Re: RESEND [PATCH 2/3] NetXen: Support per PCI-function interrupt mask registers

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Message-Id: <200707011127.49766.mb@bu3sch.de>
Date:	Sun, 1 Jul 2007 11:27:49 +0200
From:	Michael Buesch <mb@...sch.de>
To:	dhananjay.phadke@...il.com
Cc:	netdev@...r.kernel.org, rob@...xen.com
Subject: Re: RESEND [PATCH 2/3] NetXen: Support per PCI-function interrupt mask registers

On Sunday 01 July 2007 04:43:27 dhananjay.phadke@...il.com wrote:
> This patch updates the various access routines to access different
> control and status settings present in different register locations.
> This will fix problems related to working of different ports in
> multi Port card.
> 
> Signed-off by: Dhananjay Phadke <dhananjay@...xen.com>
> Signed-off by: Milan Bag <mbag@...xen.com>
> 
> Index: netdev-2.6/drivers/net/netxen/netxen_nic.h
> ===================================================================
> --- netdev-2.6.orig/drivers/net/netxen/netxen_nic.h
> +++ netdev-2.6/drivers/net/netxen/netxen_nic.h
> @@ -937,6 +937,7 @@ struct netxen_adapter {
>  	struct netxen_ring_ctx *ctx_desc;
>  	struct pci_dev *ctx_desc_pdev;
>  	dma_addr_t ctx_desc_phys_addr;
> +	int intr_scheme;
>  	int (*enable_phy_interrupts) (struct netxen_adapter *);
>  	int (*disable_phy_interrupts) (struct netxen_adapter *);
>  	void (*handle_phy_intr) (struct netxen_adapter *);
> @@ -1080,37 +1081,103 @@ struct net_device_stats *netxen_nic_get_
>  
>  static inline void netxen_nic_disable_int(struct netxen_adapter *adapter)
>  {
> -	/*
> -	 * ISR_INT_MASK: Can be read from window 0 or 1.
> -	 */
> -	writel(0x7ff, PCI_OFFSET_SECOND_RANGE(adapter, ISR_INT_MASK));
> +	uint32_t	mask = 0x7ff;
> +	int count = 0;
>  
> +	DPRINTK(1, INFO, "Entered ISR Disable \n");
> +
> +	switch (adapter->portnum) {
> +	case 0:
> +		writel(0x0, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_0));
> +		break;
> +	case 1:
> +		writel(0x0, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_1));
> +		break;
> +	case 2:
> +		writel(0x0, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_2));
> +		break;
> +	case 3:
> +		writel(0x0, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_3));
> +		break;
> +	}
> +
> +	if (adapter->intr_scheme != -1 &&
> +		adapter->intr_scheme != INTR_SCHEME_PERPORT) {
> +		writel(mask,
> +			(void *)(PCI_OFFSET_SECOND_RANGE(adapter, ISR_INT_MASK)));
> +	}
> +
> +	/* Window = 0 or 1 */
> +	if (!(adapter->flags & NETXEN_NIC_MSI_ENABLED)) {
> +		do {
> +			writel(0xffffffff, (void *)
> +				(PCI_OFFSET_SECOND_RANGE(adapter, ISR_INT_TARGET_STATUS)));
> +			mask = readl((void *)
> +					(pci_base_offset(adapter, ISR_INT_VECTOR)));
> +			udelay(10);

This needlessly always delays at least 10 uS, even if it succeed on the
first attempt.
Better do it like I suggested to avoid that.

-- 
Greetings Michael.
-
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