netdev - Re: [PATCH] b44: power down PHY when interface down

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Message-Id: <200707011223.17235.mb@bu3sch.de>
Date:	Sun, 1 Jul 2007 12:23:16 +0200
From:	Michael Buesch <mb@...sch.de>
To:	Lennert Buytenhek <buytenh@...tstofly.org>
Cc:	Török Edvin <edwintorok@...il.com>,
	zambrano@...adcom.com, netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org, power@...host.org
Subject: Re: [PATCH] b44: power down PHY when interface down

On Sunday 01 July 2007 01:17:34 Lennert Buytenhek wrote:
> More or less.  You can't add the resistances like that, since the
> bus isolation chip buffers the IDSEL signal, but it is correct that
> if the host's IDSEL resistor is larger than a certain value, the
> combination of the resistive coupling of IDSEL plus the extra buffer
> in the isolator might be causing the IDSEL input on the 'guest' PCI
> board to assert too late (or not assert at all), causing config
> accesses to fail.
> 
> (This also depends on the specific 'guest' PCI board used, as you
> noted, due to differing IDSEL trace lengths/capacitances and input
> pin capacitances on different PCI boards.  Also, it might work at
> 33 MHz but not work at 66 MHz, etc.)

It doesn't work on any of my boards :(

> If you feel adventurous, you could try to hack around this by
> figuring out which AD[31:16] line this PCI slot's IDSEL line is
> resistively coupled to (depends on the slot), and then adding
> another parallel resistor on the board itself to make the bus
> isolator's input buffer charge faster.  Note that this does
> increase the load on that specific AD[] line, which might cause
> other funny effects.

Well, but how to find out to which address line it's connected to?
Pretty hard to follow the PCB traces, especially since it's
multilayered.

-- 
Greetings Michael.
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