netdev - Re: [PATCH 0/24] make atomic_read() behave consistently across all architectures

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Date:	Tue, 21 Aug 2007 16:48:51 +0200
From:	Segher Boessenkool <segher@...nel.crashing.org>
To:	Paul Mackerras <paulus@...ba.org>
Cc:	Russell King <rmk+lkml@....linux.org.uk>,
	Christoph Lameter <clameter@....com>,
	heiko.carstens@...ibm.com, horms@...ge.net.au,
	linux-kernel@...r.kernel.org,
	"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>, ak@...e.de,
	netdev@...r.kernel.org, cfriesen@...tel.com,
	akpm@...ux-foundation.org, rpjday@...dspring.com,
	Nick Piggin <nickpiggin@...oo.com.au>,
	linux-arch@...r.kernel.org, jesper.juhl@...il.com,
	satyam@...radead.org, zlynx@....org, schwidefsky@...ibm.com,
	Chris Snook <csnook@...hat.com>,
	Herbert Xu <herbert@...dor.apana.org.au>, davem@...emloft.net,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	wensong@...ux-vs.org, wjiang@...ilience.com
Subject: Re: [PATCH 0/24] make atomic_read() behave consistently across all architectures

>> Let me say it more clearly: On ARM, it is impossible to perform atomic
>> operations on MMIO space.
>
> Actually, no one is suggesting that we try to do that at all.
>
> The discussion about RMW ops on MMIO space started with a comment
> attributed to the gcc developers that one reason why gcc on x86
> doesn't use instructions that do RMW ops on volatile variables is that
> volatile is used to mark MMIO addresses, and there was some
> uncertainty about whether (non-atomic) RMW ops on x86 could be used on
> MMIO.  This is in regard to the question about why gcc on x86 always
> moves a volatile variable into a register before doing anything to it.

This question is GCC PR33102, which was incorrectly closed as a 
duplicate
of PR3506 -- and *that* PR was closed because its reporter seemed to
claim the GCC generated code for an increment on a volatile (namely, 
three
machine instructions: load, modify, store) was incorrect, and it has to
be one machine instruction.

> So the whole discussion is irrelevant to ARM, PowerPC and any other
> architecture except x86[-64].

And even there, it's not something the kernel can take advantage of
before GCC 4.4 is in widespread use, if then.  Let's move on.


Segher

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