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Message-ID: <1188339690.5248.15.camel@dell>
Date: Tue, 28 Aug 2007 15:21:30 -0700
From: "Michael Chan" <mchan@...adcom.com>
To: "Christoph Hellwig" <hch@...radead.org>
cc: "Arjan van de Ven" <arjan@...radead.org>,
"netdev" <netdev@...r.kernel.org>
Subject: Re: make bnx2.c use msleep()
On Tue, 2007-08-28 at 22:10 +0100, Christoph Hellwig wrote:
> On Tue, Aug 28, 2007 at 02:05:30PM -0700, Arjan van de Ven wrote:
> > bnx2.c (incorrectly) sets current->state directly to
> > TASK_UNINTERRUPTIBLE, without going through set_task_state(). However
> > all the code wants to do is an msleep so just make it do that instead...
>
> > REG_WR(bp, BNX2_PCICFG_MISC_CONFIG, val);
> >
> > if ((CHIP_ID(bp) == CHIP_ID_5706_A0) ||
> > - (CHIP_ID(bp) == CHIP_ID_5706_A1)) {
> > - current->state = TASK_UNINTERRUPTIBLE;
> > - schedule_timeout(HZ / 50);
> > - }
> > + (CHIP_ID(bp) == CHIP_ID_5706_A1))
> > + msleep(20);
>
> Umm, a msleep just after a register write awfully sounds like a posting
> bug waiting to happen to me..
>
This is a special case since we are resetting the chip. A read right
after chip reset will hang the bus especially for A0 and A1 and that's
why we need the msleep(). TG3 also has the same problem with chip
reset. The code that comes after the msleep() will read and poll for
the reset to complete.
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