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Message-ID: <535ddc6b0709120947x3458c87dk7dac9a2b8edf26f6@mail.gmail.com> Date: Wed, 12 Sep 2007 09:47:46 -0700 From: "Mandeep Baines" <mandeep.baines@...il.com> To: "Stephen Hemminger" <shemminger@...ux-foundation.org> Cc: "James Chapman" <jchapman@...alix.com>, hadi@...erus.ca, "Bill Fink" <billfink@...dspring.com>, netdev@...r.kernel.org, davem@...emloft.net, jeff@...zik.org, ossthema@...ibm.com Subject: Re: RFC: possible NAPI improvements to reduce interrupt rates for low traffic rates On 9/12/07, Stephen Hemminger <shemminger@...ux-foundation.org> wrote: > But if you compare this to non-NAPI driver the same softirq > overhead happens. The problem is that for many older devices disabling IRQ's > require an expensive non-cached PCI access. Smarter, newer devices > all use MSI which is pure edge triggered and with proper register > usage, NAPI should be no worse than non-NAPI. Why would disabling IRQ's be expensive on non-MSI PCI devices? Wouldn't it just require a single MMIO write to clear the interrupt mask of the device. These are write-buffered so the latency should be minimal. As mentioned in Jamal's UKUUG paper, any MMIO reading could be avoided by caching the interrupt mask. - To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
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