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Date:	Thu, 7 Feb 2008 08:30:33 -0500
From:	Christoph Hellwig <hch@...radead.org>
To:	Ben Dooks <ben-linux@...ff.org>
Cc:	netdev@...r.kernel.org, jeff@...zik.org, akpm@...ux-foundation.org,
	daniel@...aq.de, laurentp@...-semaphore.com
Subject: Re: [PATCH 01/24 for-2.6.25] DM9000: Fix endian-ness of data
	accesses. Patch from: Laurent Pinchart <laurentp@...-semaphore.com>

On Tue, Feb 05, 2008 at 12:02:00AM +0000, Ben Dooks wrote:
> This patch splits the receive status in 8bit wide fields and convert the
> packet length from little endian to CPU byte order.
> 
> Signed-off-by: Laurent Pinchart <laurentp@...-semaphore.com>
> Signed-off-by: Ben Dooks <ben-linux@...ff.org>
> 
> Index: linux-2.6.24-git5-dm9k/drivers/net/dm9000.c
> ===================================================================
> --- linux-2.6.24-git5-dm9k.orig/drivers/net/dm9000.c
> +++ linux-2.6.24-git5-dm9k/drivers/net/dm9000.c
> @@ -867,7 +867,8 @@ dm9000_timer(unsigned long data)
>  }
>  
>  struct dm9000_rxhdr {
> -	u16	RxStatus;
> +	u8	RxPktReady;
> +	u8	RxStatus;
>  	u16	RxLen;

thgis should be __le16.  Also please install sparse and do a

	make C=2 CHECKFLAGS="-D__CHECK_ENDIAN__"

run over the driver to make sure all hw structures are properly
annotated and you do byteswaps consistantly.

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