netdev - Re: [PATCH] PHYLIB: Add 1000Base-X support for Broadcom bcm5482

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Message-Id: <07AD8671-95BB-4E5F-9BDD-469F207EACE1@freescale.com>
Date:	Thu, 15 May 2008 16:11:13 -0500
From:	Andy Fleming <afleming@...escale.com>
To:	Nate Case <ncase@...-inc.com>
Cc:	"Maciej W. Rozycki" <macro@...ux-mips.org>,
	netdev <netdev@...r.kernel.org>
Subject: Re: [PATCH] PHYLIB: Add 1000Base-X support for Broadcom bcm5482


On May 15, 2008, at 16:03, Nate Case wrote:

> On Thu, 2008-05-15 at 00:15 +0100, Maciej W. Rozycki wrote:
>> OK.  One note on this occasion: please keep the registers sorted by  
>> the
>> index.  I missed it with the original review, but the additional  
>> registers
>> at 0x15, 0x17 and 0x18 (and the values within) should be placed  
>> between
>> MII_BCM54XX_ESR at 0x11 and MII_BCM54XX_ISR at 0x1a.
>
> Fixed this in patch v3 (coming up shortly).
>
>> I was a bit worried how it plays with actually trying to force  
>> different,
>> perhaps incompatible, link parameters.
>
> I didn't try forcing speeds from userspace, but the worst I can  
> envision
> happening is that after forcing 10mbit/s or half-duplex mode (for
> example) it would still report 1000mbit/s FD.  The forcing itself  
> would
> probably not report an error, though you could argue that it  
> should.  My
> understanding is that the hardware will take the writes but ignore  
> those
> registers in 1000Base-X mode.

To get an error in these situations, you could change the phydev's  
supported modes to indicate only 1000BT is supported, and that  
autonegotiation has to be off.

Andy
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